This master thesis investigates the ability to configure properties of Latching Current Limiters (LCLs) without the need for component level customization. An LCL is a protective circuit used on satellite power systems to protect sensitive equipment from overcurrent or short circuit like faults. The properties most integral to LCLs are its trip time and current limitation, both of which define the class of the LCL ranging from class 1 to class 10. A daughter board circuit was developed which connected to specific nodes of an LCL circuit. By sending control signals to this circuit, it successfully managed to alter the trip time and current limiting capabilities of LCLs, effectively changing their class in accordance with ECSS standards. These properties were altered by selectively drawing current and adding capacitance to the LCL circuit at specific nodes using analog electronics. The circuit demonstrated the capability to be controlled using telecommands sent via a Field-Programmable Gate Array (FPGA), thereby enabling the LCL properties to be configured prior to launch or re-configured in orbit.