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  • 51. Loiko, P.
    et al.
    Serres, J. M.
    Delekta, S. S.
    Kifle, E.
    Mateos, X.
    Baranov, A.
    Aguiló, M.
    Díaz, F.
    Griebner, U.
    Petrov, V.
    Popov, Sergei
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Li, Jiantong
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Inkjet-printing of graphene saturable absorbers for ~2 μm bulk and waveguide lasers2017In: Optics InfoBase Conference Papers, Optical Society of America, 2017, Vol. Part F41Conference paper (Refereed)
    Abstract [en]

    We report on inkjet-printing of graphene saturable absorbers (SAs) suitable for passive Qswitching of ~2-μm bulk and waveguide lasers. Using graphene-SA in a microchip Tm:KLu(WO4)2 laser, 1.2 μJ/136 ns pulses are generated at 1917 nm.

  • 52. Lu, H.
    et al.
    Zhang, H.
    Yuan, S.
    Wang, J.
    Zhan, Y.
    Zheng, Lirong
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. Fudan University, China.
    An optical dynamic study of MAPbBr3 single crystals passivated with MAPbCl3/I3-MAPbBr3 heterojunctions2017In: Physical Chemistry, Chemical Physics - PCCP, ISSN 1463-9076, E-ISSN 1463-9084, Vol. 19, no 6, p. 4516-4521Article in journal (Refereed)
    Abstract [en]

    Recently, perovskite based solar cells have attracted lots of research interest, some of which is in the passivation of perovskite surfaces, particularly the heterojunction based surface passivation. In this study, the optical dynamics of MAPbBr3 single crystals with and without heterojunction passivation were studied systematically by means of a time-resolved spectroscopic technique for the first time. The emission lifetime of MAPbBr3 single crystals under two-photon (1064 nm) excitation is a few orders of magnitude longer than that measured under one-photon (355 nm or 532 nm) excitation. Interestingly, with surface passivation, the lifetime measured at 355 nm excitations could be tuned significantly, whereas the lifetime change under 1064 nm excitations was considerably less. Our results give a direct evidence of surface quench by comparing the lifetimes before and after surface passivation. Furthermore, the results demonstrate that proper MAPbCl3-MAPbBr3 heterojunctions can dramatically reduce the recombination channels in the surface region, which can be potentially useful for perovskite based solar cells, light emitting diodes (LED), and sensitive detectors.

  • 53.
    Malm, B. Gunnar
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Elahipanah, Hossein
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Salemi, Arash
    KTH, School of Information and Communication Technology (ICT).
    Östling,
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Gated base structure for improved current gain in SiC bipolar technology2017In: 2017 47th European Solid-State Device Research Conference (ESSDERC) 11-14 Sept. 2017, Editions Frontieres , 2017, p. 122-125Conference paper (Refereed)
    Abstract [en]

    Silicon Carbide (SiC) bipolar integrated circuits are a promising technology for extreme environment applications. SiC bipolar technology shows stable operation over a wide range of temperature. However, the current gain of the devices is suffering from high surface recombination, due to poor oxide passivation. In this paper we propose a gated base structure that offers improved current gain control. A polysilicon gate is formed on the passivation oxide on top of the base-link region. We investigate the current gain as a function of gate bias and temperature. A negative gate bias improves the gain at low collector current by more than 30% by suppressing the surface recombination. Measurements are presented at temperatures ranging from 300 K to 550 K and the gain is consistently improved. The proposed structure is also useful as a process monitor for the passivation oxide quality.

  • 54.
    Malm, B. Gunnar
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Grahn, Jan V.
    KTH, School of Information and Communication Technology (ICT).
    Östling, Mikael
    KTH, School of Electrical Engineering and Computer Science (EECS).
    Bipolar technology2016In: The VLSI Handbook: Second Edition, CRC Press , 2016, p. 1.3-1.25Chapter in book (Other academic)
  • 55. Markova, N. P.
    et al.
    Grishin, Alexander M.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. Petrozavodsk State University, Russian Federation .
    Biocompatible Er:(Na,K)NbO3 nanofibers2017In: 4th International School and Conference "Saint Petersburg OPEN 2017" on Optoelectronics, Photonics, Engineering and Nanostructures, Institute of Physics Publishing (IOPP), 2017, Vol. 917, no 4, article id 042028Conference paper (Refereed)
    Abstract [en]

    Dense homogeneous fabric composed from continuous bead-free erbium-doped sodium potassium niobate (Er:NKN) 100 μm long and 100-200 nm in diameter nanofibers was sintered by sol-gel calcination assisted electrospinning technique. Er doping with the concentration of 2 at.% provides readily detectable room-temperature broad-band photoluminescence (PL) centered at λPL = 0.55 and 0.98 μm being pumped, respectively, with 532 and 785 nm lasers. Electric field induced resistance switching and strong electric rectification effect were found in nanoporous sandwich Au/Er:NKN/Pt capacitive cell. Memristor-type current-voltage I-V characteristics originate from the electrochemical migration of oxygen vacancies at the n-type Er:NKN oxide/high work function Pt cathode junction interface.

  • 56. Matindoust, Samaneh
    et al.
    Farzi, Ali
    Nejad, Majid Baghaei
    Abadi, Mohammad Hadi Shahrokh
    Zou, Zhuo
    KTH, School of Information and Communication Technology (ICT).
    Zheng, Li-Rong
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Ammonia gas sensor based on flexible polyaniline films for rapid detection of spoilage in protein-rich foods2017In: Journal of materials science. Materials in electronics, ISSN 0957-4522, E-ISSN 1573-482X, Vol. 28, no 11, p. 7760-7768Article in journal (Refereed)
    Abstract [en]

    This work details the fabrication and performance of a sensor for ammonia gas, based on conducting polymer. The fabrication procedure consists following steps; polyaniline synthesis via oxidative polymerization technique, then a sensitive polyaniline film was deposited on a printed circuit board and finally, polyaniline microdevice were assembled on an interdigitated electrode arrays to fabricate the sensor for amomonia gas detection. Response time of this chemiresistive devices and humidity impact were examined for NH3 sensitivity and compared with commercial gas sensors (Taguchi Model 826). Data export from sensor to the computer was carried out via data logger model ADC-24 and analyzed using SPSS software. The sensor was found to have a rapid (t = 40 s) and stable linear response to ammonia gas in the concentration range of interest (50-150 ppm) under room temperature operation condition. It was reviled also reliable results to the variation of environment humidity. Power consumption, sensitivity, dimension, flexibility and fabrication cost were used as most important parameters to compare the new polymer based device with those of other similar works and the results showed that small size, low cost, flexibility, low power consumption and high sensitivity are from the benefits of this innovative device. In real-time application conditions flexible polyaniline based gas sensor with polyimide substrate in thickness 0.25 mm exhibits relatively good performance and accurate evaluation of food spoilage.

  • 57. Meneghesso, G.
    et al.
    Moens, P.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Sonsky, J.
    Stoffels, S.
    Smart Power Devices Nanotechnology2017In: Nanoelectronics: Materials, Devices, Applications, Wiley-VCH Verlagsgesellschaft, 2017, Vol. 1, p. 163-204Chapter in book (Refereed)
    Abstract [en]

    The scope of this chapter is to present the state of the art of the available power devices, highlighting the main potential and limitation and indicating the path for the future materials and device technology that will be required to meet the request for a green energy world. Starting with a general introduction on the role of power electronics in nanoelectronics, a summary of the main advances in device technology will then be presented. Advanced new Si technologies, new power device based on silicon carbide (SiC), and gallium nitride (GaN) will be described in detail, highlighting the main potential and limitation of the different technologies. The main challenges for the availability of new materials and new substrates will also be discussed. These materials and substrates need to be available with very high quality and at low cost. This study will highlight the main issues, which are limiting the production of reliable devices in applications where, next to efficiency, reliability is also a must (automotive, satellite, etc.).

  • 58. Nathan, A.
    et al.
    Pavan, P.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Editorial EIC2017In: IEEE Journal of the Electron Devices Society, ISSN 2168-6734, Vol. 5, no 3, p. 147-148, article id 7911398Article in journal (Refereed)
  • 59. Negash, B.
    et al.
    Westerlund, T.
    Rahmani, A. M.
    Liljeberg, P.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. University of Turku, Finland.
    DoS-IL: A Domain Specific Internet of Things Language for Resource Constrained Devices2017In: 8th International Conference on Ambient Systems, Networks and Technologies, ANT-2017 and the 7th International Conference on Sustainable Energy Information Technology, SEIT 2017, 16-19 May 2017, Madeira, Portugal, Elsevier, 2017, Vol. 109, p. 416-423Conference paper (Refereed)
    Abstract [en]

    The common approach enabling a resource constrained device to get connected to the Internet is through programming instructions and transferring it to an embedded device. This procedure involves various tools and cross-compiling of the code depending on the platform architecture. In practical IoT applications, where a huge number of nodes exist, this process becomes almost impossible due to the heterogeneous platforms and protocols involved and the deployment conditions. This paper introduces a flexible and scalable approach that enhances modifiability and programmability through client-server-server-client architecture. It allows changing the behavior of the system after deployment through a lightweight script written with a domain specific language, DoS-IL, and stored in a gateway at the fog layer. An embedded resource browser is used to request and execute the script. The results of analysis for this model and the tools developed along the way are discussed.

  • 60. Noman, Uzair A.
    et al.
    Negash, Behailu
    Rahmani, Amir M.
    Liljeberg, Pasi
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    From Threads to Events: Adapting a Lightweight Middleware for Contiki OS2017In: 2017 14TH IEEE ANNUAL CONSUMER COMMUNICATIONS & NETWORKING CONFERENCE (CCNC), IEEE , 2017, p. 486-491Conference paper (Refereed)
    Abstract [en]

    Interoperability is one of the key requirements in the Internet of Things considering the diverse platforms, communication standards and specifications available today. Inherent resource constraints in the majority of IoT devices makes it very difficult to use existing solutions for interoperability, thus demanding new approaches. This paper presents the process of adapting a lightweight interoperability middleware for IoT, LISA, from RIOT to Contiki OS and evaluates memory and power overheads. The middleware follows a service oriented architecture and classifies devices according to available resources to assign different roles, such as Application, Service and Manager Nodes. These roles live in different tiers in a generic IoT architecture, where the Manager nodes are located in the intermediate Fog layer. To adapt to an event based kernel of Contiki, the middleware defines and handles a set of events that are used to communicate with the user application. A network of nodes is simulated to show the architecture promoted by the middleware and the results are presented.

  • 61.
    Noroozi, Mohammad
    et al.
    KTH, School of Engineering Sciences (SCI), Applied Physics. Linköping University, Sverige.
    Jayakumar, Ganesh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zahmatkesh, Katayoun
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Lu, J.
    Hultman, L.
    Mensi, Mounir
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Marcinkevicius, Saulius
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Hamawandi, Bejan
    KTH, School of Engineering Sciences (SCI), Applied Physics, Biomedical and X-ray Physics.
    Yakhshi Tafti, Mohsen
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Ergül, Adem
    KTH, School of Engineering Sciences (SCI), Applied Physics.
    Ikonic, Z.
    Toprak, Muhammet
    KTH, School of Engineering Sciences (SCI), Applied Physics, Biomedical and X-ray Physics.
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Unprecedented thermoelectric power factor in SiGe nanowires field-effect transistors2017In: ECS Journal of Solid State Science and Technology, ISSN 2162-8769, E-ISSN 2162-8777, Vol. 6, no 9, p. Q114-Q119Article in journal (Refereed)
    Abstract [en]

    In this work, a novel CMOS compatible process for Si-based materials has been presented to form SiGe nanowires (NWs) on SiGe On Insulator (SGOI) wafers with unprecedented thermoelectric (TE) power factor (PF). The TE properties of SiGe NWs were characterized in a back-gate configuration and a physical model was applied to explain the experimental data. The carrier transport in NWs was modified by biasing voltage to the gate at different temperatures. The PF of SiGe NWs was enhanced by a factor of >2 in comparison with bulk SiGe over the temperature range of 273 K to 450 K. This enhancement is mainly attributed to the energy filtering of carriers in SiGe NWs, which were introduced by imperfections and defects created during condensation process to form SiGe layer or in NWs during the processing of NWs.

  • 62. Putrolaynen, V. V.
    et al.
    Grishin, Alexander M.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. Petrozavodsk State University, Russia.
    Rigoev, I. V.
    Anti-Scratch AlMgB14 Gorilla (R) Glass Coating2017In: Technical physics letters, ISSN 1063-7850, E-ISSN 1090-6533, Vol. 43, no 10, p. 871-874Article in journal (Refereed)
    Abstract [en]

    Hard aluminum-magnesium boride (BAM) films were fabricated onto Corning (R) Gorilla (R) Glass by radio-frequency magnetron sputtering of a single stoichiometric AlMgB14 target. BAM films exhibit a Vickers hardness from 10 to 30 GPa and a Young's modulus from 80 to 160 GPa depending on applied loading forces. Deposited hard coating increases the critical load at which glass substrate cracks. The adhesion energy of BAM films on Gorilla (R) Glass is 6.4 J/m(2).

  • 63. Qin, C.
    et al.
    Yin, H.
    Wang, G.
    Hong, P.
    Ma, X.
    Cui, H.
    Lu, Y.
    Meng, L.
    Zhong, H.
    Yan, J.
    Zhu, H.
    Xu, Q.
    Li, J.
    Zhao, C.
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. University of Chinese Academy of Sciences, China.
    Study of sigma-shaped source/drain recesses for embedded-SiGe pMOSFETs2017In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 181, p. 22-28Article in journal (Refereed)
    Abstract [en]

    In this paper, the manufacturing process and formation mechanism study of sigma-shaped source/drain (S/D) recess in 28 nm node pMOSFETs and beyond have been presented. The mechanism of forming sigma-shaped recesses included a detailed analysis how to apply the dry and wet etching to shape the recess in a controlled way. The key factors in etching parameters were identified and optimized. Simulations of strain distributions in the channel region of the devices with selectively grown Si0.65Ge0.35 on different S/D recess shapes were carried out and the results were used as feedback to find out a trade-off between maximum strain in the channel region of the transistors and low short channel effect. Finally, guidelines for designing the shape of recess and for tuning the etching parameters for high mobility transistors have been proposed.

  • 64.
    Radamson, Henry H.
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Luo, J.
    Qin, C.
    Yin, H.
    Zhu, H.
    Zhao, C.
    Wang, G.
    Optimization of Selective Growth of SiGe for Source/Drain in 14nm and beyond Nodes FinFETs2017In: International Journal of High Speed Electronics and Systems, ISSN 0129-1564, Vol. 26, no 1-2, article id 1740003Article in journal (Refereed)
    Abstract [en]

    In this work, optimization of selective epitaxy growth (SEG) of SiGe layers on source/drain (S/D) areas in 14nm node FinFETs with high-k & metal gate has been presented. The Ge content in epilayers was in range of 30%-40% with boron concentration of 1-3 × 1020 cm-3. The strain distribution in the transistor structure due to SiGe as stressor material in S/D was simulated and these results were used as feedback to design the layer profile. The epitaxy parameters were optimized to improve the layer quality and strain amount of SiGe layers. The in-situ cleaning of Si fins was crucial to grow high quality layers and a series of experiments were performed in range of 760-825 °C. The results demonstrated that the thermal budget has to be within 780-800 °C in order to remove the native oxide but also to avoid any harm to the shape of Si fins. The Ge content in SiGe layers was directly determined from the misfit parameters obtained from reciprocal space mappings using synchrotron radiation. Atomic layer deposition (ALD) technique was used to deposit HfO2 as high-k dielectric and B-doped W layer as metal gate to fill the gate trench. This type of ALD metal gate has decent growth rate, low resistivity and excellent capability to fill the gate trench with high aspect-ratio. Finally, the electrical characteristics of fabricated FinFETs were demonstrated and discussed.

  • 65. Rahmani, A. M.
    et al.
    Haghbayan, M. -H
    Liljeberg, P.
    Jantsch, A.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Multi-objective power management for CMPs in the dark silicon age2017In: The Dark Side of Silicon: Energy Efficient Computing in the Dark Silicon Era, Springer, 2017, p. 191-216Chapter in book (Refereed)
    Abstract [en]

    New power management challenges in networked many-core systems arise when limitations of the dark silicon era come into reality. The main goal in the power management process is to achieve optimal power-performance efficiency considering thermal design power (TDP) budget. This necessitates: (1) monitoring several system characteristics including both communication and computation aspects, (2) categorizing, prioritizing, and processing the information in an intelligent way, and (3) controlling a rich set of actuators. More precisely, a comprehensive Observe-Decide-Act (ODA) loop based multi-objective control approach is needed, which has access to a rich set of sensors and actuators. In this chapter, we first identify a necessary set of system parameters for monitoring such as an upper limit on total power consumption, dynamic behavior of workloads, utilization of processing elements, per-core power consumption, load on network-on-chip (NoC), etc. We also discuss essential actuators needed for the power management process together with a multi-objective and dark silicon aware power management policy that is able to simultaneously consider all the mentioned parameters. As actuator, fine-grained voltage and frequency scaling is utilized, including near-threshold operation, per-core power gating, as well as scheduler-level actuation to maximize the system throughput while honoring the power budget.

  • 66. Rahmani, A. M.
    et al.
    Liljeberg, P.Hemani, AhmedKTH, School of Information and Communication Technology (ICT), Electronics.Jantsch, A.Tenhunen, HannuKTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    The dark side of silicon: Energy efficient computing in the dark silicon era2017Collection (editor) (Other academic)
    Abstract [en]

    This book presents the state-of-the art of one of the main concerns with microprocessors today, a phenomenon known as “dark silicon”. Readers will learn how power constraints (both leakage and dynamic power) limit the extent to which large portions of a chip can be powered up at a given time, i.e. how much actual performance and functionality the microprocessor can provide. The authors describe their research toward the future of microprocessor development in the dark silicon era, covering a variety of important aspects of dark silicon-aware architectures including design, management, reliability, and test. Readers will benefit from specific recommendations for mitigating the dark silicon phenomenon, including energy-efficient, dedicated solutions and technologies to maximize the utilization and reliability of microprocessors.

  • 67. Rauf, Shahid
    et al.
    Riaz, Muhammad Ali
    Shahid, Humayun
    Iqbal, Muhammad Sohail
    Amin, Yasar
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Triangular loop resonator based compact chipless RFID tag2017In: IEICE Electronics Express, ISSN 1349-2543, E-ISSN 1349-2543, Vol. 14, no 4, article id 20161262Article in journal (Refereed)
    Abstract [en]

    A novel, frequency selective surface (FSS) inspired, fully passive, chipless data encoding circuit capable of being operated as a radio frequency identification (RFID) tag is presented. The tag is composed of finite repetitions of the unit cell realized on a grounded FR4 substrate having an overall size of 27.5 x 30mm(2). The unit cell is made up of several triangle-shaped resonators patterned in a looped fashion. Variation in the geometric structure of the tag, achieved by addition or removal of nested loops, corresponds to a specific bit sequence. Each sequence is represented in the spectral domain as a unique frequency signature of the resonators. The proposed 10-bit tag covers the spectral range from 4 to 11 GHz. The tag is compact, robust, and exhibits a stable response to impinging signals at different angles of incidence.

  • 68. Riaz, M. A.
    et al.
    Shahid, H.
    Aslam, S. Z.
    Amin, Yasar
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. University of Engineering and Technology, Pakistan.
    Akram, A.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. University of Turku, Finland.
    Novel T-shaped resonator based chipless RFID tag2017In: IEICE Electronics Express, ISSN 1349-2543, E-ISSN 1349-2543, Vol. 14, no 18Article in journal (Refereed)
    Abstract [en]

    A novel, frequency selective surface (FSS) based, data encoding structure amenable to be used as a chipless RFID tag is proposed. The data encoding structure is made up of finite repetitions of a unit cell fabricated on commercially available grounded FR4 substrate having physical dimensions of 15 × 15mm2. The unit cell is composed of numerous T-shaped resonant elements arranged as two atypical sets of concentric nested loops. Alteration in geometry of the encoding circuit, attained by inclusion or omission of nested resonators, corresponds to a particular data sequence. Each encoded data sequence is manifested in the frequency domain as a distinct spectral signature. The proposed 10-bit tag is both compact and robust, and remains interrogable in response to illuminating electromagnetic waves at various angles of incidence.

  • 69. Sahebi, G.
    et al.
    Majd, A.
    Ebrahimi, Masoumeh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Plosila, J.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    A reliable weighted feature selection for auto medical diagnosis2017In: Proceedings - 2017 IEEE 15th International Conference on Industrial Informatics, INDIN 2017, Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 985-991, article id 8104907Conference paper (Refereed)
    Abstract [en]

    Feature selection is a key step in data analysis. However, most of the existing feature selection techniques are serial and inefficient to be applied to massive data sets. We propose a feature selection method based on a multi-population weighted intelligent genetic algorithm to enhance the reliability of diagnoses in e-Health applications. The proposed approach, called PIGAS, utilizes a weighted intelligent genetic algorithm to select a proper subset of features that leads to a high classification accuracy. In addition, PIGAS takes advantage of multi-population implementation to further enhance accuracy. To evaluate the subsets of the selected features, the KNN classifier is utilized and assessed on UCI Arrhythmia dataset. To guarantee valid results, leave-one-out validation technique is employed. The experimental results show that the proposed approach outperforms other methods in terms of accuracy and efficiency. The results of the 16-class classification problem indicate an increase in the overall accuracy when using the optimal feature subset. Accuracy achieved being 99.70% indicating the potential of the algorithm to be utilized in a practical auto-diagnosis system. This accuracy was obtained using only half of features, as against an accuracy of66.76% using all the features.

  • 70. Sahebi, Golnaz
    et al.
    Majd, Amin
    Ebrahimi, Masoumeh
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits. Univ Turku, Finland.
    Plosila, Juha
    Karimpour, Japer
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits. Univ Turku, Finland.
    SEECC: A Secure and Efficient Elliptic Curve Cryptosystem for E-health Applications2016In: 2016 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2016), IEEE, 2016, p. 492-500Conference paper (Refereed)
    Abstract [en]

    Security is an essential factor in wireless sensor networks especially for E-health applications. One of the common mechanisms to satisfy the security requirements is cryptography. Among the cryptographic methods, elliptic curve cryptography is well-known, as by having a small key length it provides the same security level in comparison with the other public key cryptosystems. The small key sizes make ECC very interesting for devices with limited processing power or memory such as wearable devices for E-health applications. It is vitally important that elliptic curves are protected against all kinds of attacks concerning the security of elliptic curve cryptography. Selection of a secure elliptic curve is a mathematically difficult problem. In this paper, an efficient elliptic curve selection framework, called SEECC, is proposed to select a secure and efficient curve front all the available elliptic curves. This method enhances the security and efficiency of elliptic curve cryptosystems by using a parallel genetic algorithm.

  • 71.
    Salemi, Arash
    et al.
    KTH, School of Information and Communication Technology (ICT).
    Elahipanah, Hossein
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Jacobs, Keijo
    KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    15 kV-Class Implantation-Free 4H-SiC BJTs With Record High Current Gain2018In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 39, no 1, p. 63-66Article in journal (Refereed)
    Abstract [en]

    Implantation-free mesa-etched ultra-high-voltage (0.08 mm(2)) 4H-SiC bipolar junction transistors (BJTs) with record current gain of 139 are fabricated, measured, and analyzed by device simulation. High current gain is achieved by optimized surface passivation and optimal cell geometries. The area-optimized junction termination extension is utilized to obtain a high and stable breakdown voltage without ion implantation. The open-base blocking voltage of 15.8 kV at a leakage current density of 0.1 mA/cm(2) is achieved. Different cell geometries (single finger, square, and hexagon cell geometries) are also compared.

  • 72.
    Salemi, Arash
    et al.
    KTH.
    Elahipanah, Hossein
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    10+ kV implantation-free 4H-SiC PiN diodes2017In: 11th European Conference on Silicon Carbide and Related Materials, ECSCRM 2016, Trans Tech Publications Ltd , 2017, p. 423-426Conference paper (Refereed)
    Abstract [en]

    Implantation-free mesa etched 10+ kV 4H-SiC PiN diodes are fabricated, measured and analyzed by device simulation. An area-optimized junction termination extension (O-JTE) is implemented in order to achieve a high breakdown voltage. The diodes design allows a high breakdown voltage of about 19.3 kV according to simulations by Sentaurus TCAD. No breakdown voltage is recorded up to 10 kV with a very low leakage current of 0.1 μA. The current spreading within the thick drift layer is considered and a voltage drop (VF) of 8.3 V and 11.4 V are measured at 50 A/cm2 and 100 A/cm2, respectively. The differential on-resistance (Diff. Ron) of 67.7 mΩ.cm2 and 55.7 mΩ.cm2 are measured at 50 A/cm2 and 100 A/cm2, respectively.

  • 73. Satti, J. A.
    et al.
    Habib, A.
    Zeb, S.
    Amin, Yasar
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. University of Engineering and Technology (UET), Pakistan.
    Loo, J.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. University of Turku, Finland.
    Highly-dense flexible chipless RFID tag2017In: IEICE Electronics Express, ISSN 1349-2543, E-ISSN 1349-2543, Vol. 14, no 18Article in journal (Refereed)
    Abstract [en]

    A 27-bit circular shaped, highly-dense, fully printable chipless radio frequency identification (RFID) tag is presented in this letter. High data capacity is provided in a compact size. The total dimension of the tag is 22 × 22mm2. For exciting the tag, the linearly polarized incident plane wave is used. The circular shaped tag structure is analyzed for three different substrates, i.e., Rogers RT/duroid®/5870, Taconic TLX-0 and DuPont™ Kapton® HN. The spectral range for Rogers RT/duroid®/5870 is 3.3-13.5 GHz, 3.4-13.6 GHz for Taconic TLX-0 and 3.7-15.1 GHz for DuPont™ Kapton® HN substrate. Flexibility is achieved by using Kapton® HN substrate. The presented tag is low-cost and flexible; hence it can be easily deployed on wide range of objects.

  • 74. Severikov, V. S.
    et al.
    Grishin, Alexander M.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. Petrozavodsk State University, Russian Federation.
    Ignahin, V. S.
    Study of inverse magnetostrictive effect in metallic glasses Fe80-xCoxP14B62017In: Journal of Physics, Conference Series, ISSN 1742-6588, E-ISSN 1742-6596, Vol. 929, no 1, article id 012049Article in journal (Refereed)
    Abstract [en]

    The paper presents the possibility to build a tension gauge capable to discriminate different kinds of deformations: compression and twisting (induced by torsion strain) based on the magnetoelastic effect in new metallic glasses Fe80-xCoxP14B6. Applied loads increase coercive field H c, saturation induction B s and rectangularity of magnetic hysteresis loop. For example, hysteresis loop traced for 1 mm narrow, 50 cm long and 30 μm thick Fe40Co40P14B6 straight ribbon subjected to longitudinal stress of 346 MPa shown increased B s from 1.24 to 1.7 T and squareness from 0.55 to 0.88 compared to unloaded specimen. For twisting, on the contrary, both squareness and coercive field vary whereas the value of B s remains unchanged.

  • 75.
    Smith, Anderson D.
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Elgammal, Karim
    KTH, Centres, SeRC - Swedish e-Science Research Centre. KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics.
    Fan, Xuge
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Lemme, Max C.
    RWTH Aachen, Otto-Blumenthal-Str., 52074 Aachen, Germany .
    Delin, Anna
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. KTH, Centres, SeRC - Swedish e-Science Research Centre.
    Råsander, Mikael
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Bergqvist, Lars
    KTH, Centres, SeRC - Swedish e-Science Research Centre. KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics.
    Schröder, Stephan
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. SenseAir AB, Sweden..
    Fischer, Andreas C.
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems. Karlsruhe Institute of Technology (KIT), Germany..
    Niklaus, Frank
    KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Graphene-based CO2 sensing and its cross-sensitivity with humidity2017In: RSC Advances, ISSN 2046-2069, E-ISSN 2046-2069, Vol. 7, no 36, p. 22329-22339Article in journal (Refereed)
    Abstract [en]

    We present graphene-based CO2 sensing and analyze its cross-sensitivity with humidity. In order to assess the selectivity of graphene-based gas sensing to various gases, measurements are performed in argon (Ar), nitrogen (N2), oxygen (O2), carbon dioxide (CO2), and air by selectively venting the desired gas from compressed gas bottles into an evacuated vacuum chamber. The sensors provide a direct electrical readout in response to changes in high concentrations, from these bottles, of CO2, O2, nitrogen and argon, as well as changes in humidity from venting atmospheric air. From the signal response to each gas species, the relative graphene sensitivity to each gas is extracted as a relationship between the percentage-change in graphene's resistance response to changes in vacuum chamber pressure. Although there is virtually no response from O2, N2 and Ar, there is a sizeable cross-sensitivity between CO2 and humidity occurring at high CO2 concentrations. However, under atmospheric concentrations of CO2, this cross-sensitivity effect is negligible – allowing for the use of graphene-based humidity sensing in atmospheric environments. Finally, charge density difference calculations, computed using density functional theory (DFT) are presented in order to illustrate the bonding of CO2 and water molecules on graphene and the alterations of the graphene electronic structure due to the interactions with the substrate and the molecules.

  • 76.
    Smith, Anderson D.
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Wagner, Stefan
    Kataria, Satender
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Lemme, Max C.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Wafer-Scale Statistical Analysis of Graphene FETs-Part I: Wafer-Scale Fabrication and Yield Analysis2017In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 64, no 9, p. 3919-3926Article in journal (Refereed)
    Abstract [en]

    Wafer-scale, CMOS compatible graphene transfer has been established for device fabrication and can be integrated into a conventional CMOS process flow back end of the line. In Part I of this paper, statistical analysis of graphene FET (GFET) devices fabricated on wafer scale is presented. Device yield is approximately 75% (for 4500 devices) measured in terms of the quality of the top gate, oxide layer, and graphene channel. Statistical evaluation of the device yield reveals that device failure occurs primarily during the graphene transfer step. In Part II of this paper, device statistics are further examined to reveal the primary mechanism behind device failure. The analysis from Part II suggests that significant improvements to device yield, variability, and performance can be achieved through mitigation of compressive strain introduced in the graphene layer during the graphene transfer process. The combined analyses from Parts I and II present an overview of mechanisms influencing GFET behavior as well as device yield. These mechanisms include residues on the graphene surface, tears, cracks, contact resistance at the graphene/metal interface, gate leakage as well as the effects of postprocessing.

  • 77.
    Smith, Anderson D.
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Wagner, Stefan
    Kataria, Satender
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Lemme, Max C.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Wafer-Scale Statistical Analysis of Graphene Field-Effect Transistors-Part II: Analysis of Device Properties2017In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 64, no 9, p. 3927-3933Article in journal (Refereed)
    Abstract [en]

    In Part I, we have established a wafer-scale, CMOS compatible graphene transfer for the back end of the line integration. In Part II of this paper, we analyze statistical data of device properties and draw conclusions about possible causes of device failure. Statistical analysis is performed for device mobility and compared with the yield analysis. To complement this analysis, detailed Raman spectra are employed to analyze strain. In addition, device models developed in Part I are examined and provide further insight. From the analysis, it appears that compressive strain introduced during the graphene transfer process is may be the primary source for device failure. Moreover, we speculate based on the device statistics that the mitigation of compressive strain will improve device mobility, carrier density, and reduce variability. In addition, the presence of residues, tears, and cracks in the graphene may result in some device failure.

  • 78.
    Suvanam, Sethu Saveda
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Radiation Hardness of 4H-SiC Devices and Circuits2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Advances in space and nuclear technologies are limited by the capabilities of the conventional silicon (Si) electronics. Hence, there is a need to explore materials beyond Si with enhanced properties to operate in extreme environments. In this regards, silicon carbide (4H-SiC), a wide bandgap semiconductor, provides suitable solutions. In this thesis, radiation effects of 4H-SiC bipolar devices, circuits and dielectrics for SiC are investigated under various radiation types. We have demonstrated for the first time the radiation hardness of 4H-SiC logic circuits exposed to extremely high doses (332 Mrad) of gamma radiation and protons. Comparisons with previously available literature show that our 4H-SiC bipolar junction transistor (BJT) is 2 orders of magnitude more tolerant under gamma radiation to existing Si-technology. 4H-SiC devices and circuits irradiated with 3 MeV protons show about one order of magnitude higher tolerance in comparison to Si.

    Numerical simulations of the device showed that the ionization is most influential in the degradation process by introducing interface states and oxide charges that lower the current gain. Due to the gain reduction of the BJT, the voltage reference of the logic circuit has been affected and this, in turn, degrades the voltage transfer characteristics of the OR-NOR gates.

    One of the key advantages of 4H-SiC over other wide bandgap materials is the possibility to thermally grow silicon oxide (SiO2) and process device in line with advanced silicon technology. However, there are still questions about the reliability of SiC/SiO2 interface under high power, high temperature and radiation rich environments. In this regard, aluminium oxide (Al2O3), a chemically and thermally stable dielectric, has been investigated. It has been shown that the surface cleaning treatment prior to deposition of a dielectric layer together with the post dielectric annealing has a crucial effect on interface and oxide quality. We have demonstrated a new method to evaluate the interface between dielectric/4H-SiC utilizing an optical free carrier absorption technique to quantitative measure the charge carrier trapping dynamics. The radiation hardness of Al2O3/4H-SiC is demonstrated and the data suggests that Al2O3 is better choice of dielectric for devices in radiation rich applications.

  • 79.
    Suvanam, Sethu Saveda
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Kuroki, Shin-Ichiro
    Lanni, Luigia
    KTH.
    Hadayati, Raheleh
    Ohshima, Takeshi
    Makino, Takahiro
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    High Gamma Ray Tolerance for 4H-SiC Bipolar Circuits2016In: IEEE Transactions on Nuclear Science, ISSN 0018-9499, E-ISSN 1558-1578Article in journal (Refereed)
    Abstract [en]

    A high gamma radiation hardness of 4H-SiC circuits is performed. The OR NOR circuits are based on emitter coupled logic (ECL), using integrated bipolar NPN transistors. Gain degradation in individual bipolar junction transistors (BJT) is minimal up to a dose of 38 Mrad (SiO2), but for the dose of 332 Mrad (SiO2) a degradation of 52% is observed. The SiC BJTs show higher radiation hardness than existing Si-technology and high stability under temperature stress. It is proposed that the oxide charge-dominated recombination is the key base current recombination mechanism contributing to gain degradation. An improvement in the gain is seen after annealing at 400 °C for 1800 s due to the possible annealing of some of the oxide defects contributing to the oxide charge.

  • 80.
    Suvanam, Sethu Saveda
    et al.
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Usman, Muhammed
    Martin, David
    Yazdi, Milad
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics.
    Linnarsson, Margareta K.
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics.
    Götelid, Mats
    KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Improved Interface and Electrical Properties of Atomic Layer Deposited Al2O3/4H-SiCManuscript (preprint) (Other academic)
  • 81. Tcarenko, I.
    et al.
    Gia, T. N.
    Rahmani, A. M.
    Westerlund, T.
    Liljeberg, P.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. University of Turku, Finland.
    Energy-efficient IoT-enabled fall detection system with messenger-based notification2017In: 6th International Conference on Wireless Mobile Communication and Healthcare, MobiHealth 2016, Springer, 2017, Vol. 192, p. 19-26Conference paper (Refereed)
    Abstract [en]

    Falls might cause serious traumas especially among elderly people. To deliver timely medical aid, fall detection systems should be able to notify appropriately personnel immediately, when fall occurs. However, as in any system, notification mechanism affects overall energy consumption. Considering that energy efficiency affects reliability, as it influences runtime of the system, notification mechanism should be energy aware. We propose an IoT-enabled fall detection system with a messenger-based notification method, which allows to obtain energy efficient solution, decrease development time and allow to reuse facilities of a popular messaging platform.

  • 82. Tcarenko, Igor
    et al.
    Huan, Yuxiang
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Juhasz, David
    Rahmani, Amir M.
    Zou, Zhuo
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Westerlund, Tomi
    Liljeberg, Pasi
    Zheng, Lirong
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Smart Energy Efficient Gateway for Internet of Mobile Things2017In: 2017 14TH IEEE ANNUAL CONSUMER COMMUNICATIONS & NETWORKING CONFERENCE (CCNC), IEEE , 2017, p. 1016-1017Conference paper (Refereed)
    Abstract [en]

    Internet of Things (IoT) is a fast developing vision in which physical quantities are digitized, processed and analyzed. Internet of Mobile Things (IoMT) as one of new domains of IoT, due to mobility, requires a more demanding and rigorous solution in many aspects, especially in terms of energy efficiency. We propose a solution consisting of energy efficient and fast hardware platform for building IoMT Fog layer facilities. Experimental results are presented to prove superiority of the proposed hardware in several aspects to popular general purpose platforms.

  • 83.
    Tian, Ye
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    SiC Readout IC for High Temperature Seismic Sensor System2017Doctoral thesis, comprehensive summary (Other academic)
    Abstract [en]

    Over the last decade, electronics operating at high temperatures have been increasingly demanded to support in situ sensing applications such as automotive, deep-well drilling and aerospace. However, few of these applications have requirements above 460 °C, as the surface temperature of Venus, which is a specific target for the seismic sensing application in this thesis. Due to its wide bandgap, Silicon Carbide (SiC) is a promising candidate to implement integrated circuits (ICs) operating in such extreme environments. In this thesis, various analog and mixed-signal ICs in 4H-SiC bipolar technology for high-temperature sensing applications are explored, in which the device performance variation over temperatures are considered. For this purpose, device modeling, circuit design, layout design, and device/circuit characterization are involved.

    In this thesis, the circuits are fabricated in two batches using similar technologies. In Batch 1, the first SiC sigma-delta modulator is demonstrated to operate up to 500 °C with a 30 dB peak SNDR. Its building blocks including a fully-differential amplifier, an integrator and a comparator are characterized individually to investigate the modulator performance variation over temperatures. In the succeeding Batch 2, a SiC electromechanical sigma-delta modulator is designed with a chosen Si capacitive sensor for seismic sensing on Venus. Its building blocks including a charge amplifier, a multiplier and an oscillator are designed. Compared to Batch 1, a smaller transistor and two metal-interconnects are used to implement higher integration ICs in Batch 2. Moreover, the first VBIC-based compact model featured with continuous-temperature scalability from 27 to 500 °C is developed based on the SiC transistor in Batch 1, in order to optimize the design of circuits in Batch 2. The demonstrated performance of ICs in Batch 1 show the feasibility to further develop the SiC readout ICs for seismic sensor system operating on Venus.

  • 84.
    Tian, Ye
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Hedayati, Raheleh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    SiC BJT Compact DC Model With Continuous- Temperature Scalability From 300 to 773 K2017In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 64, no 9, p. 3588-3594Article in journal (Refereed)
    Abstract [en]

    The first vertical bipolar intercompany (VBIC)-based compact dc model has been developed and verified for a low-voltage 4H-SiC bipolar junction transistor to continuously map a wide temperature range from 300 to 773 K. Temperature and doping dependent physical models for bandgap, incomplete ionization, carrier mobility, and lifetime have been taken into account to give physically meaningful fitting parameters for the compact model. Isothermal simulations using the default VBIC model are performed to extract key parameter sets from measured data at seven different temperature points. Then new temperature dependent equations for the key parameters are proposed and embedded in the default VBIC model. Consequently, a single set of model parameters at 300 K is used to achieve fitting over a wide temperature range from 300 to 773 K. This new model can be used for simulating circuits that require continuous description of device dc performance over a wide temperature range.

  • 85.
    Tian, Ye
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Lanni, Luigia
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Rusu, Ana
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    A 500 °C monolithic SiC BJT latched comparator2016In: Materials Science Forum, ISSN 0255-5476, E-ISSN 1662-9752, Vol. 858, p. 921-924Article in journal (Refereed)
    Abstract [en]

    This paper presents a monolithic 4H-SiC BJT latched emitter-coupled logic (ECL) comparator for high temperature analog-to-digital conversion. The comparator consists of a low-gain pre-amplifier, a track and latch stage and an output buffer. For low-speed input signals, the comparator input offset voltage is 3.9 mV at 27 ºC and monotonically increases up to 9.1 mV at 500ºC. The single-ended output swing is 5.5 V at 27 ºC and 3.9 V at 500 ºC. The minimum comparison time is around 1 μs from 27 ºC to 500 ºC. The whole comparator dissipates 464 mW in average over the considered temperature range with a 15 V power supply. It consumes 2.25 × 0.84 mm2 chip area (with the bond pads included).

  • 86.
    Tian, Ye
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Lanni, Luigia
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Rusu, Ana
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Silicon Carbide fully differential amplifier characterized up to 500 °C2016In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 63, no 6, p. 2242-2247, article id 7451254Article in journal (Refereed)
    Abstract [en]

    This paper presents a monolithic fully differential amplifier implemented in a low-voltage 4H-silicon carbide bipolar junction transistor technology. The circuit has been designed, considering the variation of device parameters over a large temperature range. A base-current compensation technique has been applied to overcome the low input resistance of the amplifier. The bare chip of the amplifier has been measured from 27 °C to 500 °C using a hot-chuck probe station. Its openloop gain is 58 dB at 27 °C, and monotonically decreases to 37 dB at 500 °C. Its closed-loop gain reduction is ∼5 dB over the investigated temperature range. The gain-bandwidth product drops from 2.8 MHz at 27 °C to 1.3 MHz at 500 °C with 470 pF off-chip compensation capacitors. A low total-harmonicdistortion of −58.4 dB at 27 °C and −46.9 dB at 500 °C is achieved due to the fully differential implementation. A low input offset voltage of 0.5 mV at 27 °C and 6.9 mV at 500 °C is achieved without calibration. The relative high linearity and the low offset demonstrate the potential of this technology to be further investigated for the front-end sensor circuits in high-temperature applications.

  • 87.
    Tian, Ye
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    A Fully Integrated Silicon-Carbide Sigma–Delta Modulator Operating up to 500 °C2017In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 64, no 7, p. 2782-2788Article in journal (Refereed)
    Abstract [en]

    This paper presents the first fully integrated sigma-delta modulator implemented in an in-house silicon carbide (SiC) bipolar technology for high-temperature applications. A second-order 1-b continuous-time architecture is adopted. Dual-loop compensation technique is employed to accommodate one clock period comparator delay. The circuits are designed to have enoughmargins without degrading the modulator's performance, considering the variation of device parameters over a large temperature range. The measurement results show that from room temperature to 500 degrees C, themodulator's peak SNDR is constant around 30 dB at a clock speed of 512 kHz. The chip area of the modulator is 6.9 mm x 2.8 mm with one metal layer. It consumes around 1 W from a 15 V power supply. This paper demonstrates the feasibility to further develop highly integrated SiC bipolar junction transistor integrated circuits for extremely high-temperature sensing applications.

  • 88.
    Tian, Ye
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Zetterling, Carl-Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    High frequency characteristic of a monolithic 500 °C OpAmp-RC integrator in SiC bipolar IC technology2017In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 135, p. 65-70Article in journal (Refereed)
    Abstract [en]

    This paper presents a comprehensive investigation of the frequency response of a monolithic OpAmp-RC integrator implemented in a 4H-SiC bipolar IC technology. The circuits and devices have been measured and characterized from 27 to 500 degrees C. The devices have been modelled to identify that the substrate capacitance is a dominant factor affecting the OpAmp's high-frequency response. Large Miller compensation capacitors of more than 540 pF are required to ensure stability of the internal OpAmp. The measured unit-gain-bandwidth product of the OpAmp is similar to 1.1 MHz at 27 degrees C, and decreases to similar to 0.5 MHz at 500 degrees C mainly due to the reduction of the transistor's current gain. On the other hand, it is not necessary to compensate the integrator in a relatively wide bandwidth similar to 0.7 MHz over the investigated temperature range. At higher frequencies, the integrator's frequency response has been identified to be significantly affected by that of the OpAmp and load impedance. This work demonstrates the potential of this technology for high temperature applications requiring bandwidths of several megahertz.

  • 89. Ul Hassan, Mubashir
    et al.
    Arshad, Farzana
    Naqvi, Syeda Iffat
    Amin, Yasar
    KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. Univ Engn & Technol, Pakistan.
    Tenhunen, Hannu
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK. Univ Turku, Finland.
    A Compact Flexible and Frequency Reconfigurable Antenna for Quintuple Applications2017In: Radioengineering, ISSN 1210-2512, E-ISSN 1805-9600, Vol. 26, no 3, p. 655-661Article in journal (Refereed)
    Abstract [en]

    A novel, compact coplanar waveguide-fed flexible antenna is presented. The proposed design uses flexible Rogers RT/duroid 5880 (0.508 mm thickness) as a substrate with small size of 30 x 28.4 mm(2). Two switches are integrated on the antenna surface to change the current distribution which consequently changes the resonance frequency under different conditions of switches, thereby making it a frequency reconfigurable antenna. The antenna design is simulated on CST (R) MWS (R). The proposed antenna exhibits VSWR < 2 and appreciable radiation patterns with positive gain over desired frequency bands. Good agreement exists between simulated and measured results. On the basis of results, the proposed antenna is envisioned to be deployed for the following applications; aeronautical radio navigation [4.3 GHz], AMT fixed services [4.5 GHz], WLAN [5.2 GHz], Unlicensed WiMAX [5.8 GHz] and X-band [7.5 GHz].

  • 90.
    Usman, Muhammad
    et al.
    KTH, School of Information and Communication Technology (ICT). Natl Ctr Phys, Expt Phys Labs, Quaid I Azam Univ Campus,Shahdara Valley Rd, Islamabad, Pakistan.
    Suvanam, Sethu Saveda
    KTH, School of Information and Communication Technology (ICT).
    Linnarsson, Margareta
    KTH, School of Engineering Sciences (SCI), Applied Physics, Material Physics, MF.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Improving the quality of Al2O3/4H-SiC interface for device applications2018In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 81, p. 118-121Article in journal (Refereed)
    Abstract [en]

    The present paper focuses on the investigation of Al2O3/4H-SiC dielectric interface upon annealing, its consequent structural modifications, and the link to electrical properties. For this purpose, the test structures are prepared by depositing Al2O3, using atomic layer deposition (ALD), on low doped n-type 4H-SiC epitaxial layers. The structures are annealed from 300 degrees C to 1100 degrees C for different time duration (from 5 to 60 mins) and ambient such as, low vacuum (10(-1) Torr), N-2, and N2O. The structural studies on these samples are conducted using synchrotron-based high resolution x-ray photoelectron spectroscopy (HR-XPS), lab-based XPS, time of flight elastic recoil detection analysis (ToF-ERDA), and time of flight medium energy ion scattering (ToF-MEIS). The electrical response of capacitive structures is monitored through capacitance voltage (CV) measurements for as-deposited and annealed structures. It is found that the annealing at high temperatures, such as 1100 degrees C, and in N-2 or N2O environment, improves the dielectric properties due to the introduction of a thin layer of about 1 nm stable SiO2 between the Al2O3 and 4H-SiC.

  • 91. Wang, Guilei
    et al.
    Luo, Jun
    Liu, Jinbiao
    Yang, Tao
    Xu, Yefeng
    Li, Junfeng
    Yin, Huaxiang
    Yan, Jiang
    Zhu, Huilong
    Zhao, Chao
    Ye, Tianchun
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    pMOSFETs Featuring ALD W Filling Metal Using SiH4 and B2H6 Precursors in 22 nm Node CMOS Technology2017In: Nanoscale Research Letters, ISSN 1931-7573, E-ISSN 1556-276X, Vol. 12, article id 306Article in journal (Refereed)
    Abstract [en]

    In this paper, pMOSFETs featuring atomic layer deposition (ALD) tungsten (W) using SiH4 and B2H6 precursors in 22 nm node CMOS technology were investigated. It is found that, in terms of threshold voltage, driving capability, carrier mobility, and the control of short-channel effects, the performance of devices featuring ALD W using SiH4 is superior to that of devices featuring ALD W using B2H6. This disparity in device performance results from different metal gate-induced strain from ALD W using SiH4 and B2H6 precursors, i.e. tensile stresses for SiH4 (similar to 2.4 GPa) and for B2H6 (similar to 0.9 GPa).

  • 92. Wang, Guilei
    et al.
    Luo, Jun
    Qin, Changliang
    Liang, Renrong
    Xu, Yefeng
    Liu, Jinbiao
    Li, Junfeng
    Yin, Huaxiang
    Yan, Jiang
    Zhu, Huilong
    Xu, Jun
    Zhao, Chao
    Radamson, Henry H.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Ye, Tianchun
    Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors2017In: Nanoscale Research Letters, ISSN 1931-7573, E-ISSN 1556-276X, Vol. 12, article id 123Article in journal (Refereed)
    Abstract [en]

    In this study, the integration of SiGe selective epitaxy on source/drain regions and high-k and metal gate for 22 nm node bulk pMOS transistors has been presented. Selective Si1-xGex growth (0.35 <= x <= 0.40) with boron concentration of 1-3 x 10(20) cm(-3) was used to elevate the source/drain. The main focus was optimization of the growth parameters to improve the epitaxial quality where the high-resolution x-ray diffraction (HRXRD) and energy dispersive spectrometer (EDS) measurement data provided the key information about Ge profile in the transistor structure. The induced strain by SiGe layers was directly measured by x-ray on the array of transistors. In these measurements, the boron concentration was determined from the strain compensation of intrinsic and boron-doped SiGe layers. Finally, the characteristic of transistors were measured and discussed showing good device performance.

  • 93. Wang, J.
    et al.
    Ebrahimi, Masoumeh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. University of Turku, Finland.
    Huang, L.
    Li, Q.
    Li, G.
    Jantsch, A.
    Minimizing the system impact of router faults by means of reconfiguration and adaptive routing2017In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 51, p. 252-263Article in journal (Refereed)
    Abstract [en]

    To tolerate faults in Networks-on-Chip (NoC), routers are often disconnected from the NoC, which affects the system integrity. This is because cores connected to the disabled routers cannot be accessed from the network, resulting in loss of function and performance. We propose E-Rescuer, a technique offering a reconfigurable router architecture and a fault-tolerant routing algorithm. By taking advantage of bypassing channels, the reconfigurable router architecture maintains the connection between the cores and the network regardless of the router status. The routing algorithm allows the core to access the network when the local router is disabled.Our analysis and experiments show that the proposed technique provides 100% packet delivery in 100%, 92.56%, and 83.25% of patterns when 1, 2 and 3 routers are faulty, respectively. Moreover, the throughput increases up to 80%, 46% and 33% in comparison with FTLR, HiPFaR, and CoreRescuer, respectively.

  • 94. Zamolo, Giovanni
    et al.
    Mao, Jia
    KTH, School of Information and Communication Technology (ICT).
    Zou, Zhuo
    KTH, School of Information and Communication Technology (ICT).
    Zheng, Li-Rong
    KTH, School of Information and Communication Technology (ICT), Elektronics, Integrated devices and circuits.
    Power-Aware Optimization for CS-based IR-UWB System2016In: 2016 IEEE INTERNATIONAL CONFERENCE ON UBIQUITOUS WIRELESS BROADBAND (ICUWB2016), IEEE conference proceedings, 2016Conference paper (Refereed)
    Abstract [en]

    Compressed sensing (CS) is an emerging technology that can be applied to impulse radio ultra-wideband (IR-UWB) receivers. CS represents an attractive solution for its capability of recovering a signal from a small number of measurements using sub-Nyquist sampling rate analog to digital converters (ADC). In this paper we investigate practical design parameters for low power CS based UWB system, including pulse bandwidth, number of measurements and frame length. Considering the FCC mask, three different pulses are compared in noisy environment in order to provide an optimal solution for high bit rate and low bit rate applications. Performance impact on number of measurements and frame length are also evaluated so that minimum numbers and length can be used for power saving.

  • 95.
    Zetterling, Carl-Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Hallén, Anders
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Hedayati, Raheleh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Kargarrazi, Saleh
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Lanni, Luigia
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Malm, B. Gunnar
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Mardani, S.
    Norström, H.
    Rusu, Ana
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Suvanam, Sethu Saveda
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Tian, Ye
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Bipolar integrated circuits in SiC for extreme environment operation2017In: Semiconductor Science and Technology, ISSN 0268-1242, E-ISSN 1361-6641, Vol. 32, no 3, article id 034002Article in journal (Refereed)
    Abstract [en]

    Silicon carbide (SiC) integrated circuits have been suggested for extreme environment operation. The challenge of a new technology is to develop process flow, circuit models and circuit designs for a wide temperature range. A bipolar technology was chosen to avoid the gate dielectric weakness and low mobility drawback of SiC MOSFETs. Higher operation temperatures and better radiation hardness have been demonstrated for bipolar integrated circuits. Both digital and analog circuits have been demonstrated in the range from room temperature to 500 °C. Future steps are to demonstrate some mixed signal circuits of greater complexity. There are remaining challenges in contacting, metallization, packaging and reliability.

  • 96. Zhang, Huotian
    et al.
    Liu, Yiting
    Lu, Haizhou
    Deng, Wan
    Yang, Kang
    Deng, Zunyi
    Zhang, Xingmin
    Yuan, Sijian
    Wang, Jiao
    Niu, Jiaxin
    Zhang, Xiaolei
    Jin, Qingyuan
    Feng, Hongjian
    Zhan, Yiqiang
    Zheng, Lirong
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits. Fudan University, China.
    Reversible air-induced optical and electrical modulation of methylammonium lead bromide (MAPbBr(3)) single crystals2017In: Applied Physics Letters, ISSN 0003-6951, E-ISSN 1077-3118, Vol. 111, no 10, article id 103904Article in journal (Refereed)
    Abstract [en]

    The photoluminescence (PL) variations of organic-inorganic hybrid lead halide perovskites in different atmospheres are well documented, while the fundamental mechanism still lacks comprehensive understandings. This study reports the reversible optical and electrical properties of methylammonium lead bromide (MAPbBr(3) or CH3NH3PbBr3) single crystals caused by air infiltration. With the change in the surrounding atmosphere from air to vacuum, the PL intensity of perovskite single crystals decreases, while the conductivity increases. By means of first-principles computational studies, the shallow trap states are considered as key elements in PL and conductivity changes. These results have important implications for the characterization and application of organic-inorganic hybrid lead halide perovskites in vacuum.

  • 97. Zhou, W.
    et al.
    Liu, S. -C
    Zhao, D.
    Yang, H.
    Ma, Z.
    Hammar, Mattias
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Printed photonic crystal membrane lasers on silicon2014In: Optics InfoBase Conference Papers, OSA - The Optical Society , 2014Conference paper (Refereed)
    Abstract [en]

    We report two types of photonic crystal membrane lasers on silicon based on photonic crystal membrane reflectors and photonic crystal bandedge effect. Multi-layer stacking and integration for beam routing and modulation will also be discussed for integrated photonics.

  • 98.
    Zurauskaite, Laura
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Hellström, Per-Erik
    KTH, School of Information and Communication Technology (ICT), Electronics.
    Östling, Mikael
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    The impact of atomic layer depositions on high quality Ge/GeO2 interfaces fabricated by rapid thermal annealing in O-2 ambient2017In: 2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings, Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 164-166, article id 7947553Conference paper (Refereed)
    Abstract [en]

    This work demonstrates high quality Ge/GeO2 interfaces fabricated by O-2 RTA that are degraded by a good quality SiO2 layer deposited by ALD. However, neither O-3 and H2O precursors commonly used during subsequent high-k ALDs nor Si precursor AP-LTO-330 do not degrade the interface. Thus Dit increase after SiO2 deposition is likely due to intermixing. Therefore, the effect of subsequent ALDs on the interface quality has to be considered while designing Ge-based gate stacks.

  • 99.
    Östling, Mikael
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
    Gutierrez, Edmundo
    Alquier, Daniel
    Simoen, Eddy
    An editorial on the recent advances in high and low temperature electronics2017In: Semiconductor Science and Technology, ISSN 0268-1242, E-ISSN 1361-6641, Vol. 32, no 8, article id 080201Article in journal (Refereed)
12 51 - 99 of 99
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