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  • 251.
    di Tommaso, P.
    et al.
    Ansaldo Signal, Italy.
    Flammini, Francesco
    Ansaldo Signal, Italy.
    Lazzaro, A.
    Ansaldo Signal, Italy.
    Pellecchia, R.
    Ansaldo Signal, Italy.
    Sanseviero, A.
    Ansaldo Signal, Italy.
    The simulation of anomalies in the functional testing of the ERTMS/ETCS trackside system2005Inngår i: HASE 2005 : Ninth IEEE International Symposium on High Assurance Systems Engineering: 12-14 October 2005, Heidelberg, Germany, Heidelberg: Springer, 2005, s. 131-139Konferansepaper (Fagfellevurdert)
    Abstract [en]

    ERTMS/ETCS is going to become the reference standard for modern railway signalling. To develop a safe and reliable Automatic Train Protection System (ATPS) based on ERTMS/ETCS, a detailed functional testing phase is needed, meeting the requirements of international railway safety standards. In this paper we deal with the functional validation of the trackside part of an ERTMS/ETCS compliant system. An extensive set of functional tests have been specified in order to thoroughly verify the system, using an innovative approach based on influence variables and state diagrams. However, such a detailed test specification requires a great amount of time and resources to be entirely executed in the real environment. Moreover, several tests need to generate abnormal safety-critical conditions that are unfeasible on the field. In this paper we describe how we overcame such problems using a specific simulation environment capable to quickly and automatically execute anomaly tests in normal as well as in degraded operating conditions.

  • 252. Diallo, P. I.
    et al.
    Attarzadeh-Niaki, Seyed Hosein
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Robino, Francesco
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Sander, Ingo
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Champeau, J.
    Öberg, Johnny
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    A formal, model-driven design flow for system simulation and multi-core implementation2015Inngår i: 2015 10th IEEE International Symposium on Industrial Embedded Systems, IEEE , 2015, s. 254-263Konferansepaper (Fagfellevurdert)
    Abstract [en]

    With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.

  • 253.
    Didic, Alma
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nikolaidis, Pavlos
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Real-time control in industrial IoT2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    Great advances in cloud computing have drawn the interest of industry. Cloud infrastructures areused, mainly, for monitoring the shop oor. In recent years cloud technologies combined with IoTtechnologies have initiated the eort to close loops between industrial applications and cloud infras-tructures. This thesis examines the eect of including remote servers, both local and centralized,in the closed control loop. Specically, we investigate how delays and jitter aect the closed controlloop. A prototype is developed to include servers on a control loop and inject delays and jitter inthe network. Furthermore, delay mitigation mechanisms are proposed and, using the prototype, anumber of experiments are performed to evaluate them. The mitigation mechanisms focus mainlyon delays and jitter that are larger than the period of closed control loop. The proposed mechanismsimprove the closed control loop response but still fall short compared to the performance of the closecontrol loop when it executes locally, without any servers included. We also, show that local serverscan be included in the closed control loop without signicant degradation in the performance of thesystem.

  • 254.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Locating type errors in untyped CLP programs2000Inngår i: Analysis and Visualization Tools for Constraint Programming: Constraint Debugging, Berlin: Encyclopedia of Global Archaeology/Springer Verlag, 2000, s. 121-150Kapittel i bok, del av antologi (Annet vitenskapelig)
    Abstract [en]

    This chapter presents a static diagnosis tool that locates type errors in untyped CLP programs without executing them. The existing prototype is specialised for the programming language CHIP [4.10], but the idea applies to any CLP language. The tool works with approximated specifications which describe types of procedure calls and successes. The specifications are expressed as a certain kind of term grammars. The tool automatically locates at compile time all the errors (with respect to a given specification) in a program. The located erroneous program fragments are (prefixes of) clauses. The tool aids the user in constructing specifications incrementally; often a fragment of the specification is already sufficient to locate an error. The presentation is informal. The focus is on the motivation of this work and on the functionality of the tool. Some related formal aspects are discussed in [4.15, 4.29]. The prototype tool is available from http://www.ida.liu.se/~pawpi/Diagnoser/diagnoser.html.

  • 255.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Parametric descriptive types for CLP2001Inngår i: Programmation en logique avec contraintes: actes des JFPLC'2001 [10e Journées francophones de programmation logique et programmation par contraintes], 24 avril-27 avril 2001, Cité des sciences et de l'industrie, Paris / [ed] Philippe Codognet, Paris: Hermés Science Publications , 2001, s. 239-256Konferansepaper (Fagfellevurdert)
  • 256.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Type-based diagnosis of CLP programs2000Inngår i: WLPE'99: Tenth Workshop on Logic Programming Environments, in connection with ICLP'99, International Conference on Logic Programming, Las Cruces, New Mexico, USA, 29 November 1999, Amsterdam: Elsevier, 2000Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The paper presents a diagnosis tool for CLP programs. It deals with partial correctness w.r.t. specifications which describe procedure calls and successes. The space of possible specifications is restricted to a kind of regular types; we propose a generalization of the concept of types used in so called descriptive typing of logic programs. In particular we distinguish ground types from those containing non-ground elements.The tool is able to automatically locate at compile time all errors in a program, this means all the clauses or clause prefixes responsible for the program being incorrect w.r.t. a given specification. The tool aids the user in constructing specifications incrementally; often a fragment of the specification is already sufficient to locate an error.Our prototype is specialized for the programming language CHIP, but the idea is applicable to any untyped CLP (and LP) language. We believe that the presented approach makes it possible to combine the advantages of typed and untyped programming languages.

  • 257.
    Drabent, Wlodek
    et al.
    Linköping University.
    Maluszynski, Jan
    Linköping University.
    Pietrzak, Pawel
    Using parametric set constraints for locating errors in CLP programs2002Inngår i: Theory and Practice of Logic Programming, ISSN 1471-0684, E-ISSN 1475-3081, Vol. 2, nr 4-5, s. 549-611Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper introduces a framework of parametric descriptive directional types for Constraint Logic Programming (CLP). It proposes a method for locating type errors in CLP programs, and presents a prototype debugging tool. The main technique used is checking correctness of programs w.r.t. type specifications. The approach is based on a generalization of known methods for proving the correctness of logic programs to the case of parametric specifications. Set constraint techniques are used for formulating and checking verification conditions for (parametric) polymorphic type specifications. The specifications are expressed in a parametric extension of the formalism of term grammars. The soundness of the method is proved, and the prototype debugging tool supporting the proposed approach is illustrated on examples. The paper is a substantial extension of the previous work by the same authors concerning monomorphic directional types.

  • 258.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Pietrzak, Pawel
    Type analysis for CHIP1999Inngår i: Algebraic Methodology and Software Technology: 7th International Conference, AMAST'98 Amazonia, Brazil, January 4-8, 1999 Proceedings / [ed] Armando Martin Haeberer, Encyclopedia of Global Archaeology/Springer Verlag, 1999, s. 389-405Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper proposes a tool to support reasoning about (partial) correctness of constraint logic programs. The tool infers a specification that approximates the semantics of a given program. The semantics of interest is an operational "call-success" semantics. The main intended application is program debugging. We consider a restricted class of specifications, which are regular types of constrained atoms. Our type inference approach is based on bottom-up abstract interpretation, which is used to approximate the declarative semantics (c-semantics). By using "magic transformations" we can describe the call-success semantics of a program by the declarative semantics of another program. We are focused on CLP over finite domains. Our prototype program analyzer works for the programming language CHIP.

  • 259.
    Dreschler, Rolf
    et al.
    Department of Computer Science, University of Bremen.
    Kerttu, Mikael
    Luleå tekniska universitet.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Thornton, Mitchell
    Low-power optimization techniques for BDD mapped circuits using temporal correlation2002Inngår i: Canadian journal of electrical and computer engineering, ISSN 0840-8688, Vol. 27, nr 4Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Low-power optimization techniques for BDD mapped circuits using temporal correlation Techniques d'optimisation pour les faibles puissances pour des diagrammes de décision binaire utilisant la corrélation temporelle Rolf Drechsler, Mikael Kerttu, Per Lindgren, and Mitchell Thornton £ In modern design flows low-power aspects should be considered as early as possible to minimize power dissipation in the resulting circuit. A new binary decision diagram-based design style that considers switching activity optimization using temporal correlation information is presented. The technique is based on an approximation method for switching activity estimation. In the case of finite state machines, the presented method extracts signal statistics by means of Markov chain analyses. Experimental results on a set of MCNC and ISCAS89 benchmarks show the estimated reduction in power dissipation. Les aspects relatifs aux faibles puissances devraient être pris en compte dès les premières phases du design en vue de minimiser la dissipation de puissance du circuit résultant. Cet article présente une méthode de design basée sur un diagramme de décision binaire qui traite l'optimisation des commutations via l'information de corrélation temporelle. L'approche repose sur une approximation de l'estimation de l'activité decommutation. Dans le cas des machines àétats finis, la méthode extrait les statistiques du signal via une analyse par chaînes de Markov. Des résultats expérimentaux obtenus avec des données de banc d'essai MCNC et ISCAS89 montrent la réduction estimée de la dissipation de puissance

  • 260.
    Du, Rong
    et al.
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Fischione, Carlo
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Power Allocation for Channel Estimation and EnergyBeamforming in Wirelessly Powered Sensor Networks2018Inngår i: Proceedings of IEEE International Conference on Communications Workshops, 2018Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Wirelessly powered sensor networks (WPSNs) are becoming increasingly important to monitor many internet-of-things systems. In these WPSNs, dedicated base stations (BSs) with multiple antennas charge the sensor nodes without the need of replacing their batteries thanks to two essential procedures: i)  getting of the channel state information of the nodes by sending pilots, and based on this, ii) performing energy beamforming to transmit energy to the nodes. However, the BSs have limited power budget and thus these two procedures are not independent, contrarily to what  is assumed in some previous studies. In this paper, we investigate the novel problem of how to optimally allocate the power for channel estimation and energy transmission. Although the problem is non-convex, we provide a new solution approach and a performance analysis in terms of optimality and complexity. We also provide a closed form solution for the case where the channels are estimated based on a least square estimation. The simulations show a gain of approximately 10% in allocating the power optimally, and the importance of improving the channel estimation efficiency.

  • 261.
    Du, Rong
    et al.
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Ozcelikkale, Ayca
    Fischione, Carlo
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Xiao, Ming
    Towards Immortal Wireless Sensor Networks by Optimal Energy Beamforming and Data Routing2018Inngår i: IEEE Transactions on Wireless Communications, ISSN 1536-1276, E-ISSN 1558-2248, Vol. 17, nr 8, s. 5338-5352Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    The lifetime of a wireless sensor network (WSN) determines how long the network can be used to monitor the area of interest. Hence, it is one of the most important performance metrics for WSN. The approaches used to prolong the lifetime can be briefly divided into two categories: reducing the energy consumption, such as designing an efficient routing, and providing extra energy, such as using wireless energy transfer (WET) to charge the nodes. Contrary to the previous line of work where only one of those two aspects is considered, we investigate these two together. In particular, we consider a scenario where dedicated wireless chargers transfer energy wirelessly to sensors. The overall goal is to maximize the minimum sampling rate of the nodes while keeping the energy consumption of each node smaller than the energy it receives. This is done by properly designing the routing of the sensors and the WET strategy of the chargers. Although such a joint routing and energy beamforming problem is non-convex, we show that it can be transformed into a semi-definite optimization problem (SDP). We then prove that the strong duality of the SDP problem holds, and hence the optimal solution of the SDP problem is attained. Accordingly, the optimal solution for the original problem is achieved by a simple transformation. We also propose a low-complexity approach based on pre-determined beamforming directions. Moreover, based on the alternating direction method of multipliers (ADMM), the distributed implementations of the proposed approaches are studied. The simulation results illustrate the significant performance improvement achieved by the proposed methods. In particular, the proposed energy beamforming scheme significantly out-performs the schemes where one does not use energy beamforming, or one does not use optimized routing. A thorough investigation of the effect of system parameters, including the number of antennas, the number of nodes, and the number of chargers, on the system performance is provided. The promising convergence behaviour of the proposed distributed approaches is illustrated.

  • 262.
    Du, Yong
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Online Admission Control for Multi-Switch Ethernet Networks2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    The trend of using switched Ethernet protocols in real-time domains, where timing requirements exist, is increasing. This is mainly because of the features of switched Ethernet, such as its high throughput and availability. Compared to other network technologies, switched Ethernet can support higher data rate. Besides the timing requirements, that must be fulfilled in real-time applications, another requirement is normally demanded in real-time systems. This requirement is the ability of changing, adding or removing the messages crossing the network during run-time. This ability is known as on-line reconfiguration, and it should be done in a way that the real-time behavior of the network is not violated. This means that, the guarantee of meeting the timing requirements for the messages should not be affected by the changes in the network. In this thesis, we focus on on-line reconfiguration for multi-hop HaRTES architecture, which is a real-time switched Ethernet network. The HaRTES switch is a modified Ethernet switch that provides real-time guarantees as well as an admission control to be used for on-line reconfiguration. We study the existing reconfiguration methods including centralized and distributed approaches. Then, we propose a solution to provide on-line reconfiguration for the multi-hop HaRTES architecture, based on the studied methods. For this purpose, we use a hybrid method to achieve the advantages of both traditional centralized and distributed approaches. Moreover, we perform two different experiments. In the first experiment we focus on the decision making part of the method. The decision making part decides whether the requested reconfiguration is feasible. We calculate the time required to make the decision in different network settings. In the second experiment, we focus on the entire reconfiguration process, where the decision making is part of it. Again, we show the time needed to do the reconfiguration in several network settings. Finally, we conclude the thesis by presenting possible future works

  • 263.
    Duff, Gerard
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    App enabling environment for Volvo CE platforms2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
  • 264.
    Duff, Gerard
    Mälardalens högskola, Akademin för innovation, design och teknik.
    App enabling environment to Volvo CE platforms2014Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    This thesis was submitted to the faculty of Innovation, Design and Technology, IDT, at Mälardalen university in Västerås, Sweden as a partial fulfillment of the requirements to obtain the M.Sc. in computer science, specializing in embedded systems. The work presented was carried out in the months January to June in 2014 partially in Volvo Construction Equipment, Volvo CE, Eskilstuna, and partially at Mälardalen university in Västerås.

    Federated Resilient Embedded Systems Technology for AUTOSAR, FRESTA, is a collaborative project between Volvo and the Swedish Institute of Computer Science, SICS, that aims to make it possible to add third party applications to vehicle’s computer systems without compromising system security and robustness. The mechanism is developed by SICS for AUTOSAR, AUTomotive Open System ARchitecture, an open standardized automotive software architecture for vehicles.

    The following report documents the efforts to study and port the FRESTA mechanism to the Volvo CE platform, and develop a Java application to test the porting. The investigation will aspire to determine if it is feasible to introduce Java based third party applications to resource constrained embedded systems, without causing a deterioration in the predictability and security of the system.

  • 265.
    Dugani, Vishwanath
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Centra, Parallelldatorcentrum, PDC. KTH, Skolan för datavetenskap och kommunikation (CSC).
    Continuous system-wide profiling of High Performance Computing parallel applications: Profiling high performance applications2016Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    Profiling of an application identifies parts of the code being executed using the hardware performance counters thus providing the application’s performance. Profiling has long been standard in the development process focused on a single execution of a single program. As computing systems have evolved, understanding the bigger picture across multiple machines has become increasingly important. As supercomputing grows in pervasiveness and scale, understanding parallel applications performance and utilization characteristics is critically important, because even minor performance improvements translate into large cost savings. The study surveys various tools for the application. After which, Perfminer was integrated in SCANIA’s Linux clusters to profile CFD and FEA applications exploiting the batch queue system features for continuous system wide profiling, which provides performance insights for high performance applications, with negligible overhead. Perfminer provides stable, accurate profiles and a cluster-scale tool for performance analysis. Perfminer effectively highlights the micro-architectural bottlenecks.

  • 266.
    Düring, Morgan
    et al.
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Lindvall, Stefan
    Mehlqvist, Dan
    Öberg, Johnny
    The ProGram Compiler2003Inngår i: University Booth, DATE 2003 conference, 2003Konferansepaper (Fagfellevurdert)
  • 267.
    Ebrahimi, Masoumeh
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System. Department of Information Technology, University of Turku, Finland .
    Daneshtalab, Masoud
    Plosila, Juha
    Fault-tolerant routing algorithm for 3D NoC using hamiltonian path strategy2013Inngår i: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013, s. 1601-1604Konferansepaper (Fagfellevurdert)
    Abstract [en]

    While Networks-on-Chip (NoC) have been increasing in popularity with industry and academia, it is threatened by the decreasing reliability of aggressively scaled transistors. In this paper, we address the problem of faulty elements by the means of routing algorithms. Commonly, fault-tolerant algorithms are complex due to supporting different fault models while preventing deadlock. When moving from 2D to 3D network, the complexity increases significantly due to the possibility of creating cycles within and between layers. In this paper, we take advantages of the Hamiltonian path to tolerate faults in the network. The presented approach is not only very simple but also able to support almost all one-faulty unidirectional links in 2D and 3D NoCs.

  • 268.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, Martin
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Inbyggda styrsystem.
    Towards a curricula for Cyber-Physical Systems2014Inngår i: Proceedings of the Workshop on Embedded Systems Education, WESE2014, New Delhi, India, ACM Digital Library, 2014Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Embedded and Cyber-Physical Systems education faces several challenges as well as opportunities as every-"thing" becomes connected, and as technology development accelerates. Initiatives such as CDIO, as well as several other academic and industry initiatives to create new CPS programs illustrate strong interests and awareness of these challenges. We provide an overview of foreseen educational needs, existing state of the art in education and an analysis of the subject of CPS with the purpose of understanding the implications for education. The investigation points to key issues in curriculum design regarding balancing depth and breadth, theory and practices, academic and industrial needs, and core technical skills with complementary skills. Curricula in CPS could, if the right balance is achieved, educate CPS engineers of the future that are "ready to engineer".

  • 269.
    Edlund, Fredrik
    et al.
    KTH, Skolan för teknik och hälsa (STH), Medicinsk teknik, Data- och elektroteknik.
    Sarker, Saqib
    KTH, Skolan för teknik och hälsa (STH), Medicinsk teknik, Data- och elektroteknik.
    Smart Kitchen: Automatisk inventering av föremål2016Independent thesis Basic level (university diploma), 10 poäng / 15 hpOppgave
    Abstract [sv]

    Internet of Things växer fort och förutspås bli en del av vardagen. Detta öppnar möjligheter för att skapa produkter som förenklar vardagslivet. Automatisk objektsidentifiering kombinerad med en automatiserad lagerstatus kan underlätta inventering, något som kan användas till exempel i smarta kylskåp för att göra vardagen enklare genom Internet of Things.Detta examensarbete studerar metoder inom objektsidentifikation för att ta fram ett system som automatiskt kan identifiera objekt och hantera lagerstatus. En prototyp framställdes och testades för att se vilka möjligheter som finns. Systemet använder en Raspberry Pi som basenhet, vilken använder Dlib-bibliotek för att identifiera objekt som har blivit fördefinierade. Vid okända objekt identifierar användaren objekt i en mobilapplikation, systemet kan genom detta lära sig identifiera nya objekt. Samma applikation används för att se lagerstatusen på de olika objekt som har registrerats av systemet. Prototypen klarar av att identifiera kända objekt samt att lära sig nya, enligt projektets mål.

  • 270.
    Edström, Urban
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik. Centrum för medicinsk teknik och strålningsfysik.
    Nackvinkelmätningar vid thoraxoperation: Kan prismaglasögon underlätta arbetet för operationssjuksköterskor?2017Independent thesis Advanced level (degree of Master (One Year)), 40 poäng / 60 hpOppgave
  • 271.
    Edström, Urban
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik.
    Nackvinkelmätningar vid thoraxoperation: Kan prismaglasögon underlätta arbetet för operationssjuksköterskor?2017Independent thesis Advanced level (degree of Master (One Year)), 20 poäng / 30 hpOppgave
  • 272.
    Edvinsson, Nils
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper.
    Energy harvesting power supply for wireless sensor networks: Investigation of piezo- and thermoelectric micro generators2013Independent thesis Basic level (degree of Bachelor), 10 poäng / 15 hpOppgave
    Abstract [en]

    Computers and their constituent electronics continue to shrink. The same amount of work can be done with increasingly smaller and cheaper components that need less power to function than before. In wireless sensor networks, the energy needed by one sensor node borders the amount that is already present in its immediate surroundings. Equipping the electronics with a micro generator or energy harvester gives the possibility that it can become self-sufficient in energy.

    In this thesis two kinds of energy harvesters are investigated. One absorbs vibrations and converts them into electricity by means of piezo-electricity. The other converts heat flow through a semiconductor to electricity, utilizing a thermoelectric effect. Principles governing the performance, actual performance of off-the-shelf components and design considerations of the energy harvester have been treated. The thermoelectric micro generator has been measured to output power at 2.7 mW and 20°C with a load of 10 W. The piezoelectric micro generator has been measured to output power at 2.3 mW at 56.1 Hz, with a mechanical trim weight and a load of 565 W. In these conditions the power density of the generators lies between 2-3 W/m2.

  • 273.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Area Efficient Floating-Point Adder and Multiplier with IEEE-754 Compatible Semantics2014Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we describe an open source floating-point adder andmultiplier implemented using a 36-bit custom number format based onradix-16 and optimized for the 7-series FPGAs from Xilinx. Althoughthis number format is not identical to the single-precision IEEE-754format, the floating-point operators are designed in such a way thatthe numerical results for a given operation will be identical to theresult from an IEEE-754 compliant operator with support forround-to-nearest even, NaNs and Infs, and subnormalnumbers. The drawback of this number format is that the rounding stepis more involved than in a regular, radix-2 based operator. On theother hand, the use of a high radix means that the area costassociated with normalization and denormalization can be reduced,leading to a net area advantage for the custom number format, underthe assumption that support for subnormal numbers is required.

    The area of the floating-point adder in a Kintex-7 FPGA is 261 sliceLUTs and the area of the floating-point multiplier is 235 slice LUTsand 2 DSP48E blocks. The adder can operate at 319 MHz and themultiplier can operate at a frequency of 305 MHz.

  • 274.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    EBRAM - Extending the BlockRAMs in FPGAs to support caches and hash tables inan efficient manner2012Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.

  • 275.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Optimizing Xilinx designs through primitive instantiation2010Inngår i: FPGAworld '10 Proceedings of the 7th FPGAworld Conference, New York: ACM , 2010, s. 20-27Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper is intended as a guideline for people who are interested in manual instantiation of FPGA primitives as a way of improving the performance of an FPGA design. The focus of the paper is on designs where slice primitives like flip-fops and lookup tables are instantiated. Guidelines on how to develop a design with manual instantiation are presented together with a case study of a high performance bitserial two's complement divider where a majority of the area is manually instantiated. This divider is capable of reaching a maximum frequency of 345 MHz in the fastest Virtex-4 while utilizing less than 150 LUTs thanks to the high amount of manual optimizations. An open source library containing modules intended to promote the structured development of modules with manually instantiated components is also presented.

  • 276.
    Ehliar, Andreas
    et al.
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Siverskog, Jacob
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Using Partial Reconfigurability to aid Debugging of FPGA Designs2011Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper discusses the use of partial reconfigurability in Xilinx FPGA designs in order to aid debugging. A debugging framework is proposed where the use of partial reconfigurability can allow for added flexibility by allowing a debugger to decide at run time what debugging module to use. This paper also presents an open source debugging tool which allows a user to read-out the contents of memory blocks in Xilinx designs without needing to use any JTAG adapter. This allows a user to debug an FPGA in situations which would otherwise be difficult, i.e. in the field.

  • 277.
    Eilertsen, Svein Morten
    et al.
    Bioforsk Nord Tjøtta.
    Karlsson, Johannes
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik.
    Electronically sensors system to warn drivers if a reindeer is close to the road or the railway2014Inngår i: Nordic Association of Agricultural Scientists: NJF Report, 2014, Vol. 10, s. 30-30Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In Norway, Sweden and Finland approximately 9.000 reindeer are killed every year in traffic accidents (road and railway). In field experiments two different electronically sensor system were used. The purpose is to warn car drivers and railway engineers that reindeer are close to, or on the traffic system, and reduce the numbers of accident. The information system developed by Telespor is based on GPS/GSM radio collars. These collars use SMS to inform that the reindeer are close to the traffic system. In addition to the warning, the reindeer owners get information about the reindeer land use throughout the whole year. The collars are expensive (approx. 250 euros/unit) and need battery change every year. At Umeå University a system based on wireless sensor nodes attached to the reindeer collars is developed. This node will send out a periodic warning radio beacon. On road sticks a warning device will be attached containing a radio receiver and LED flashlights that will warn if a radio beacon is received. To further increase the warning distance it is possible to use communication between the roadside warning devices and let several devices flash their LED lights when a reindeer is detected. The radio collar (approx. 15 euros/unit) will have a theoretical battery life of more than 10 years. The radio range is around 500 meters between the radio collar and the roadside warning device, which is more than sufficient.

  • 278.
    Ekman, Jonas
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Borg, Johan
    Johansson, Jonny
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    De Lauretis, Maria
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindner, Marcus
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Nilsson, Joakim
    Projekt: Frekvensomriktares funktion i beredskapskritiska system2014Annet (Annet (populærvitenskap, debatt, mm))
    Abstract [sv]

    Vid dödnätstart av produktionsanläggningar och drift av svaga nät eller ö-drift är frekvensomriktare som driver pumpar och fläktar kritiska komponenter. Om frekvensomriktare påverkas av störningar i nätet kan elproduktion kopplas bort och det svaga nätet eller ö-driften kollapsa. Projektet ska studera frekvensomriktare ur ett antal aspekter såsom uppbyggnad, styrning och implementering i syfte att utveckla mer robusta frekvensomriktare och implementering av dessa för att säkerställa drift av svaga nät och ö-drift och minimera ytterligare driftstörningar vid svåra påfrestningar på elnätet.

  • 279.
    Ekman, Jonas
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Johansson, Jonny
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Borg, Johan
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Variable-Frequency Drives: Three perspectives2014Konferansepaper (Fagfellevurdert)
  • 280.
    Ekstrand, Fredrik
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Resource Optimized Stereo Matching in Reconfigurable Hardware for Autonomous Systems2011Licentiatavhandling, med artikler (Annet vitenskapelig)
    Abstract [en]

    There is a need for compact, high-speed, and low-power vision systems for enabling real-time mobile autonomous applications. The best approach to achieve this is to implement the bulk of the application in hardware. Reconfigurable hardware meet these requirements without the limitation of fixed functionality that accompanies application-specific circuits. Resource constraints of reconfigurable hardware calls for optimized implementations i terms of resource usage with maintained performance.

    The research group in Robotics at Mälardalen University is moving toward the completion of a reconfigurable hardware-platform for stereo vision, coupled with a compact embedded computer. This system will incorporate hardware-based preprocessing components enabling visual perception for autonomous machines. This thesis covers the reconfigurable hardware section of the vision system concerning the realization of scene depth extraction. It shows the advantages of image preprocessing in hardware and propose a resource optimized approach to stereo matching. The work quantifies the impact of reduced resource utilization and a desire for increased accuracy in disparity estimation. The implemented stereo matching approach performs on par with recent similar implementations in terms of accuracy, but excels in terms of resource utilization and resource sharing, as the external memory requirement is removed for larger images.

    Future work aims to further include processes for navigation, and structure and object recognition. Furthermore, the system will be adapted to real world scenarios, both indoors and outdoors.

  • 281.
    Ekstrand, Fredrik
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Ahlberg, Carl
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Ekström, Mikael
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Asplund, Lars
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Spampinato, Giacomo
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Resource Limited Hardware-based Stereo Matching for High-Speed Vision System2011Inngår i: ICARA 2011 - Proceedings of the 5th International Conference on Automation, Robotics and Applications, 2011, s. 465-469Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper proposes a limited implementation of areabasedstereo matching for minimal resource utilization. It shows that it is possible to achieve an acceptable disparity map without the use of expensive resources. The matching accuracy for the single-row SAD can even outperform that of its full-row counterpart. Additionally, it excels in terms of frame rate and resource utilization, and is highly suitable for real-time stereo-vision systems.

  • 282.
    Ekstrand, Fredrik
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Ahlberg, Carl
    Ekström, Mikael
    Asplund, Lars
    Spampinato, Giacomo
    Utilization and Performance Considerations in Resource Optimized Stereo Matching for Real-Time Reconfigurable Hardware2012Inngår i: VISAPP 2012 - Proceedings of the International Conference on Computer Vision Theory and Application, vol. 2, 2012, s. 415-418Konferansepaper (Annet vitenskapelig)
    Abstract [en]

    This paper presents a set of approaches for increasing the accuracy of basic area-based stereo matching methods. It is targeting real-time FPGA systems for dense disparity map estimation. The methods are focused on low resource usage and maximized improvement per cost unit to enable the inclusion of an autonomous system in an FPGA. The approach performs on par with other area-matching implementations, but at substantially lower resource usage. Additionally, the solution removes the requirement for external memory for reconfigurable hardware together with the limitation in image size accompanying standard methods. As a fully piped complete on-chip solution, it is highly suitable for real-time stereo-vision systems, with a frame rate over 100 fps for Megapixel images.

  • 283.
    Eliasson, Jens
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Delsing, Jerker
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Pietrzak, Pawel
    Kyusakov, Rumen
    Project: Architecture for Service-Oriented Process – Monitoring and Control2011Annet (Annet (populærvitenskap, debatt, mm))
  • 284.
    Eliasson, Jens
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Delsing, Jerker
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    A bluetooth-based sensor node for low-power ad hoc networks2008Inngår i: Journal of Computers, ISSN 1796-203X, E-ISSN 1796-203X, Vol. 3, nr 5, s. 1-10Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    TCP/IP has recently taken promising steps toward being a viable communication architecture for networked sensor nodes. Furthermore, the use of Bluetooth can enable a wide range of new applications, and in this article, an overview of the performance and characteristics of a networked sensor node based on TCP/IP and Bluetooth is presented. The number of Bluetooth-enabled consumer devices on the market is increasing, which gives Bluetooth an advantage compared to other radio technologies from an interoperability point of view. However, this excellent ability to communicate introduces disadvantages since neither TCP/IP nor Bluetooth were designed with resource-constrained sensor nodes in mind. We, however, argue that the constraints imposed by general purpose protocols and technologies can be greatly reduced by exploiting characteristics of the communication scheme in use and efficient and extensive use of available low-power modes. Furthermore, we claim that a Bluetooth-enabled networked sensor node can achieve an operating lifetime in the range of years using a total volume of less than 10 cm3. The Mulle Embedded Internet System (EIS), along with its advanced power management architecture, is presented as a case-study to support the claims.

  • 285.
    Eliasson, Jens
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Delsing, Jerker
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Thompson, Simon J.
    Monash University, Melbourne, VIC.
    Cheng, Yi-Bing
    Monash University, Melbourne, VIC.
    A power management architecture for sensor nodes2007Inngår i: IEEE Wireless Communications & Networking Conference: WCNC 2007 ; 11 - 15 March 2007, [Hong Kong], Piscataway, NJ: IEEE Communications Society, 2007, s. 3008-3013Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Wireless sensor nodes are a versatile, generalpurpose technology capable of measuring, monitoring and controlling their environment. Even though sensor nodes are becoming ever smaller and more power efficient, there is one area that is not yet fully addressed; Power Supply Units (PSUs). Standard solutions that are efficient enough for electronic devices with higher power consumption than sensor nodes, such as mobile phones or PDAs, may prove to be ill suited for the extreme low-power and size requirements often found on wireless sensor nodes. In this paper, a system-level design of a Power Management Architecture (PMA) is presented. The PMA is an integration of PSU hardware and various software components, and is capable of supplying a sensor node with energy from multiple sources, as well as providing status information from the PSU. The heart of the architecture is a context- and power-aware Task manager, which controls when the nodes low-power modes are activated, and is highly integrated with PSU hardware as well as other software components in the system. Its main responsibility is to schedule when energy consuming tasks can be dispatched. Depending on the task priority and system configuration, a task can be either dispatched, discarded or delayed. This approach ensures that only critical tasks will be allowed to use the battery, and that the system will be powered by renewable energy when performing other non-critical tasks.

  • 286.
    Eliasson, Jens
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lundberg, Magnus
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, Signaler och system.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Time synchronous bluetooth sensor networks2006Inngår i: IEEE Consumer Communications and Networking Conference: CCNC 2006, Piscataway, NJ: IEEE Communications Society, 2006, s. 336-340Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Bluetooth-equipped wireless sensor nodes can be quickly integrated in small home networks. These networks can be utilized e.g. for surveillance, home monitoring and automation. Accurate time is an important factor for time-stamping of sensor data, encryption/authentication and it can also to used to implement time synchronous schemes for low power radio communication. We argue that IP-based time synchronization, such as various flavors of the NTP protocol, can be used with Bluetooth networks. This in combination with an activation schedule allows an efficient trade-off between energy consumption and communication delay, and provides easy integration with available infrastructure. The proposed approach in this paper is well suited for smaller wireless home networks, typically singlehop networks with access points that are always available. Our approach is verified by experiments performed on a COTS-based platform using Bluetooth.

  • 287.
    El-khoury, Jad
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Asplund, Fredrik
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Biehl, Matthias
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Loiret, Frederic
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    A Roadmap Towards Integrated CPS Development Environments2013Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Cyber Physical System (CPS) development is highly heterogeneous, involving many stakeholders, each of which interacts with its development artifacts through a variety of tools, and within several engineering processes. Successful CPS development requires these tools to be well-integrated into a Development Environment (DE) in order to support its many stakeholders and processes. In this paper we identify the main challenges facing DE development for CPSs, and presents a roadmap to meet these challenges. We here take the position that focus should be redirected from trying to achieve a single, one-size-fits-all solution to such a heterogeneous problem. Instead, focus should be placed on supporting the development of highly-customized DEs, which readily can be applied to industrial development. Such a highly-customized DE should fit the needs of a particular development organization, while at the same time taking advantage of relevant standardization efforts.

  • 288.
    El-khoury, Jad
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Redell, Ola
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, Martin
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Integrating views in a multi-view modelling environment2005Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The development of modern technical systems requires the close collaboration of various specialist teams and engineering disciplines in order to reach the expected complex functionality. Even though working with the same system towards the same goal, developers from the different domains use their own specific tools, providing their own specific views of the system to be developed. For the successful integration of the efforts from each of these disciplines, the different views produced need to be appropriately integrated, preventing any inconsistencies and divergences from creeping into the system design. We present an approach to multi-view modelling which systematically integrates the twogenerally accepted complexity reduction techniques of hierarchical decomposition and multiviewing. While these techniques are common practice in many modern design tools, the approach presented in this paper defines how the inter-view relationships can be used to tightly interweave the views' hierarchies. This provides a good basis for an information sharing environment enabling model based, multi-disciplinary development. A small case study is used to exemplify how the proposed method simplifies the process of allocating system functions to a hardware architecture in a truck.© 2005 by Jad El-khoury, Ola Redell and Martin Törngren. Published and used by INCOSE with permission.

  • 289.
    El-khoury, Jad
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, Martin
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Towards a Toolset for Architectural Design of Distributed Real-Time Control systems2001Konferansepaper (Fagfellevurdert)
  • 290.
    Ellervee, Peeter
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Hemani, Ahmed
    Kumar, Anshul
    Svantesson, Bengt
    Öberg, Johnny
    Tenhunen, Hannu
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Controller Synthesis in Control and Memory Centric High-Level Synthesis System1996Inngår i: 5th Biennial Baltic Electronic Conference, 1996, s. 393-396Konferansepaper (Fagfellevurdert)
  • 291.
    Ellervee, Peeter
    et al.
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    Kumar, Shashi
    Jantsch, Axel
    Hemani, Ahmed
    Svantesson, Bengt
    Öberg, Johnny
    Sander, Ingo
    KTH, Tidigare Institutioner, Elektroniksystemkonstruktion.
    IRSYD - An Internal Rep­resentation for System Description (Version 0.1)1997Rapport (Annet vitenskapelig)
  • 292.
    Elsts, Atis
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    Hassani Bijarbooneh, Farshid
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    Jacobsson, Martin
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation.
    Sagonas, Konstantinos
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    ProFuN TG: A tool for programming and managing performance-aware sensor network applications2015Inngår i: IEEE 40th Local Computer Networks Conference Workshops (LCN Workshops), IEEE Computer Society, 2015, s. 751-759Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Sensor network macroprogramming methodologiessuch as the Abstract Task Graph hold the promise of enablinghigh-level sensor network application development. However,progress in this area is hampered by the scarcity of tools, andalso because of insufficient focus on developing tool support forprogramming applications aware of performance requirements.

    We present ProFuN TG (Task Graph), a tool for designing sen-sor network applications using task graphs. ProFuN TG providesautomated task mapping, sensor node firmware macrocompila-tion, application simulation, deployment, and runtime mainte-nance capabilities. It allows users to incorporate performancerequirements in the applications, expressed through constraintson task-to-task dataflows. The tool includes middleware that usesan efficient flooding-based protocol to set up tasks in the network,and also enables runtime assurance by keeping track of theconstraint conditions.

    We show that the adaptive task reallocation enabled by ourapproach can significantly increase application reliability whiledecreasing energy consumption: in a network with unreliablelinks, we achieve above 99.89 % task-to-task PDR while keepingthe maximal radio duty cycle around 2.0 %.

  • 293.
    Elsts, Atis
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    Hassani Bijarbooneh, Farshid
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    Jacobsson, Martin
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation.
    Sagonas, Konstantinos
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datalogi.
    ProFuN TG: Programming Sensornets with Task Graphs for Increased Reliability and Energy-Efficiency2015Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Sensor network macroprogramming methodologies such as the Abstract Task Graph hold the promise of enabling high-level sensor network application development. However, progress in this area is hampered by the scarcity of tools, and also because of insufficient focus on developing tool support for programming applications aware of performance requirements.

    In this demo we present ProFuN TG (Task Graph), a tool for designing sensor network applications using task graphs. ProFuN TG provides automated task mapping, sensor nodefirmware macrocompilation, application simulation, deployment, and runtime maintenance capabilities. It allows users to incorporate performance requirements in the applications, expressed through constraints on task-to-task dataflows. The tool includes middleware that uses an efficient flooding-based protocol to set up tasks in the network, and also enables runtime assurance by keeping track of the constraint conditions.

    Through task allocation in a way that optimizes an objective function in a model of the network, and adaptive task reallocation in case of link, node, or sensor failures the tool helps to make sensornet applications both more energy-efficient and reliable.

  • 294. Elvmarker, Simon
    Visualization and simulation of idle truck energy usage: Prediction of battery discharge in a Volvo truck cab2018Independent thesis Advanced level (professional degree), 20 poäng / 30 hpOppgave
    Abstract [en]

    Volvo Group Trucks Technology has found a need for a new way to present the battery status and electricity consumption of their on-board batteries in combustion engine trucks. Many battery related issues the drivers are facing could be prevented if a tool was developed that could assist with energy planning in an intuitive way. In many cases, the climate control system will constitute the bulk of the energy supplied by the battery. In addition, the climate system energy demand is dependent on both user settings and factors beyond the driver’s control. This work describes the process of developing a grey-box Simulink model able to predict the battery charge depletion rate based on signals already sampled by many Volvo truck versions. The resulting model is able to estimate the time remaining until the battery state of charge (SOC) is getting close to the crankability (starting engine) limit or risks causing battery damage. The settings of the climate system are shown to have great impact on the battery charge depletion rate. Predicting the time until the battery will reach a critical limit, and adjusting the climate system settings accordingly, can make the difference between the battery charge lasting overnight or not. A way to implement additional influences, such as sunlight, are discussed and recommendations are given.

  • 295.
    Emanuelsson, Herman
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Sjunnesson, Emil
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Fjärrstyrt kamerafäste: HE Remote2013Independent thesis Basic level (university diploma), 10 poäng / 15 hpOppgave
    Abstract [sv]

    Vid tillfällen då det inte lämpar sig att stå vid en videokamera kan det lösas med ett fjärrstyrt kamerafäste. Exempel på tillfällen är på grund av platsbrist på en konsert, en högtidsceremoni där någon måste stå konstigt till för att få bra bild, ute i naturen där djur ska filmas utan att bli ivägskrämda eller vid personalbrist, en tight budget och måste styra flera kameror samtidigt. De system som finns tillgängliga på amatörmarknaden idag har antingen annan funktionalitet och passar sig inte för ovanstående problem eller har väldigt begränsad räckvidd och går inte att sammankoppla med en mobilapplikation.

    Detta projekt går ut på att ta fram en kostnadseffektiv och skräddarsydd lösning för ovanstående problem genom att utveckla ett fjärrstyrt kamerafäste i semiproffssegmentet där det via en handkontroll och vid senare skede med en mobilapplikation styr kamerans lutning och rotation även kallad tiltning och panorering.

    Skillnaderna mellan denna och befintliga lösningar är att med hjälp av Bluetooth-tekniken kan styra både med handkontroll och senare även med en mobilapplikation, anledningen till att det skall kunna styra med båda är att det inte alltid är tillåtet att använda sig av mobiltelefoner i alla miljöer där man vill filma och därför får ett bredare användningsområde för kamerafästet.

  • 296.
    Eng, David
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, Datavetenskap. david.eng@trw.com.
    Efficient MultiCore Communication in AutoSAR2017Independent thesis Advanced level (professional degree), 20 poäng / 30 hpOppgave
    Abstract [en]

    The AutoSAR specification provides a common development standard for automotive software. The functionality was initially aimed at single-core processors, and as the paradigm shifted to multiple cores in the automotive industry, new performance challenges arose. Performance is the main reason for the shift, yet the industry is competing to overcome obstacles stemming from peripherals and memory sharing. Many optimization algorithms on single-core processors do not apply to the multi-core platforms and this thesis presents a solution in the form of improvement with predictability in the multi-core AutoSAR model, including the communication time between software components. Investigated here are the scheduling policy and the priority inversion caused by scheduling inter-communicating tasks on a multi-core processor. Several problems with resource sharing and mutual locks, used in concurrent execution of the AutoSAR tasks, are explored.

     Due to the scale of these models, a tool has additionally been developed to assist with the integration to fit solutions into the final production workflow. The tool makes use of the Artop framework, based on the Eclipse Technologies, and includes the necessary function to handle the AutoSAR model. This thesis begins with a detailed introduction of the AutoSAR software development tools used in the industry and its adaption to multi-core processors in automotive application.

  • 297.
    Engström, Adam
    Linköpings universitet, Institutionen för datavetenskap, Programvara och system. Linköpings universitet, Tekniska högskolan.
    Strömsparande arkitektur för inbyggnadslinux2014Independent thesis Basic level (degree of Bachelor), 10 poäng / 15 hpOppgave
    Abstract [en]

    The objective of this work was to evaluate and implement a number of energy saving functions for a specific embedded system. The functions were then grouped into a number of energy levels with known properties in terms of functionality, energy consumption, and transition time between the levels.

    The embedded system consisted of an AT91 ARM9 processor, GSM/GPRS modem, display, Ethernet and other peripheral units. Some energy saving methods that were considered were suspend to RAM, suspend to disk, frequency scaling, and methods for saving energy in the modem, Ethernet, USB and display backlight. The functions were grouped into levels and an interface was specified for controlling the energy level.

    It proved possible to get known properties within the defined energy levels, even though the paritioning of functions into these levels proved to be sub-optimal in a typical application usage scenario because it was designed for mainly energy consumption, not usage.

    The final result is a number of energy saving functions grouped into levels, which are controllable via an application interface. Each of the levels have a known energy consumption in both loaded and un-loaded mode.

  • 298.
    Enoiu, Eduard
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Automatic test generation for industrial control software2016Doktoravhandling, med artikler (Annet vitenskapelig)
    Abstract [en]

    Since the early days of software testing, automatic test generation has been suggested as a way of allowing tests to be created at a lower cost. However, industrially useful and applicable tools for automatic test generation are still scarce. As a consequence, the evidence regarding the applicability or feasibility of automatic test generation in industrial practice is limited. This is especially problematic if we consider the use of automatic test generation for industrial safety-critical control systems, such as are found in power plants, airplanes, or trains.

    In this thesis, we improve the current state of automatic test generation by developing a technique based on model-checking that works with IEC 61131-3 industrial control software. We show how automatic test generation for IEC 61131-3 programs, containing both functional and timing information, can be solved as a model checking problem for both code and mutation coverage criteria. 

    The developed technique has been implemented in the CompleteTest tool. To evaluate the potential application of our technique, we present several studies where the tool is applied to industrial control software. Results show that CompleteTest is viable for use in industrial practice; it is efficient in terms of the time required to generate tests that satisfy both code and mutation coverage and scales well for most of the industrial programs considered.

    However, our results also show that there are still challenges associated with the use of automatic test generation. In particular, we found that while automatically generated tests, based on code coverage, can exercise the logic of the software as well as tests written manually, and can do so in a fraction of the time, they do not show better fault detection compared to manually created tests. Specifically, it seems that manually created tests are able to detect more faults of certain types (i.e, logical replacement, negation insertion and timer replacement) than automatically generated tests. To tackle this issue, we propose an approach for improving fault detection by using mutation coverage as a test criterion. We implemented this approach in the CompleteTest tool and used it to evaluate automatic test generation based on mutation testing. While the resulting tests were more effective than automatic tests generated based on code coverage, in terms of fault detection, they still were not better than manually created tests.

    In summary, our results highlight the need for improving the goals used by automatic test generation tools. Specifically, fault detection scores could be increased by considering some new mutation operators as well as higher-order mutations. Our thesis suggests that automatically generated test suites are significantly less costly in terms of testing time than manually created test suites. One conclusion, strongly supported by the results of this thesis, is that automatic test generation is efficient but currently not quite as effective as manual testing. This is a significant progress that needs to be further studied; we need to consider the implications and the extent to which automatic test generation can be used in the development of reliable safety-critical systems.

  • 299.
    Enoiu, Eduard
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Model Checking-Based Software Testing for Function-Block Diagrams2014Licentiatavhandling, med artikler (Annet vitenskapelig)
    Abstract [en]

    Software testing becomes more complex, more time-consuming, and more expensive. The risk that software errors remain undetected and cause critical failures increases. Consequently, in safety-critical development, testing software is standardized and it requires an engineer to show that tests fully exercise, or cover, the logic of the software. This method often requires a trained engineer to perform manual test generation, is prone to human error, and is expensive or impractical to use frequently in production. To overcome these issues, software testing needs to be performed earlier in the development process, more frequently, and aided by automated tools.

    We devised an automated test generation tool called COMPLETETEST that avoids many of those problems. The method implemented in the tool and described in this thesis, works with software written in Function Block Diagram language, and can provide tests in just a few seconds. In addition, it does not rely on the expertise of a researcherspecialized in automated test generation and model checking. Although COMPLETETEST itself uses a model checker, a complex technique requiring a high level of expertise to generate tests, it provides a straightforward tabular interface to the intended users. In this way, its users do not need to learn the intricacies of using this approach such as how coverage criteria can be formalized and used by a model checker to automatically generate tests. If the technique can be demonstrated to work in production, it could detect and aid in the detection of errors in safety-critical software development, where conventional testing is not always applicable and efficient.

    We conducted studies based on industrial use-case scenarios from Bombardier Transportation AB, showing how the approach can be applied to generate tests in software systems used in the safety-critical domain. To evaluate the approach, it was applied on real-world programs. The results indicate that it is efficient in terms of time required to generate tests and scales well for most of the software. There are still issues to resolve before the technique can be applied to more complex software, but we are already working on ways to overcome them. In particular, we need to understand how its usage in practice can vary depending on human and software process factors.

  • 300.
    Ericsson, Andreas
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Ericsson, Jonas
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Fjärrstyrning av värmepump2013Independent thesis Basic level (university diploma), 10 poäng / 15 hpOppgave
    Abstract [sv]

    Att fjärrstyra sin värmepump gör det möjligt att styra inomhusklimatet även då man inte är hemma. Detta passar mycket bra i exempelvis fritidshus då man enkelt kan höja temperaturen innan man skall dit och därmed kan njuta av ett behagligt inomhusklimat direkt.

    Med dagens fjärrstyrning av Daikins värmepumpar finns två problem. Systemet använder GSM-nätet och användaren måste kunna de olika SMS-koderna utantill. Fjärrstyrning används oftast i fritidshus på landsbygden och 3G-nätet har idag bättre täckning än GSM-nätet på många av dessa platser.

    Målet med examensarbetet är att ta fram ett system som åtgärdar dessa problem.

    Vi börjar med att ta fram en funktionsmodell att utgå från. Går vidare med val av hårdvara för modulen, och därefter vidare till mjukvaruutveckling.

    Resultatet av detta examensarbete är ett system för fjärrstyrning av Daikins värmepumpar som använder 3G-nätet och enkelt kan styras via en androidapplikation.

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