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  • 251.
    Delli Priscoli, Francesco
    et al.
    University of Rome la Sapienza, Italy.
    Di Giorgio, Alessandro
    University of Rome la Sapienza, Italy.
    Esposito, Mariana
    Ansaldo STS, Italy.
    Fiaschetti, Andrea
    University of Rome la Sapienza, Italy.
    Flammini, Francesco
    Ansaldo STS, Italy.
    Mignanti, Silvano
    University of Rome la Sapienza, Italy.
    Pragliola, Concetta
    Ansaldo STS, Italy.
    Ensuring cyber-security in smart railway surveillance with SHIELD2017Inngår i: International Journal of Critical Computer-Based Systems, ISSN 1757-8779, E-ISSN 1757-8787, Vol. 7, nr 2, s. 138-170Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Modern railways feature increasingly complex embedded computing systems for surveillance that are moving towards fully wireless smart-sensors. Those systems are aimed at monitoring system status from a physical-security viewpoint, in order to detect intrusions and other environmental anomalies. However, the same systems used for physical-security surveillance are vulnerable to cyber-security threats, since they feature distributed hardware and software architectures often interconnected by 'open networks', like wireless channels and the internet. In this paper, we show how the integrated approach to security, privacy and dependability (SPD) in embedded systems provided by the SHIELD framework (developed within the EU funded pSHIELD and nSHIELD research projects) can be applied to railway surveillance systems in order to measure and improve their SPD level. SHIELD implements a layered architecture (node, network, middleware and overlay) and orchestrates SPD mechanisms based on ontology models, appropriate metrics and composability. The results of prototypical application to a real-world demonstrator show the effectiveness of SHIELD and justify its practical applicability in industrial settings.

  • 252.
    Delsing, Jerker
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    IoT Automation: Arrowhead Framework2017Bok (Annet vitenskapelig)
  • 253.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Eliasson, Jens
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Gustafsson, Jonas
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Kyusakov, Rumen
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Kruglyak, Andrey
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Mcload, Stuart
    University of Warwick, Coventry.
    Harrison, Robert
    University of Warwick, Coventry.
    Colombo, Armando W.
    Schneider Electric, Marktheidenfeld.
    Mendes, J Marco
    Schneider Electric, Marktheidenfeld.
    Building System of Systems with SOA Technology: A Smart House Use Case2014Inngår i: Industrial Cloud-Based Cyber-Physical Systems: The IMC-AESOP Approach, Encyclopedia of Global Archaeology/Springer Verlag, 2014, s. 219-230Kapittel i bok, del av antologi (Fagfellevurdert)
    Abstract [en]

    The IMC-AESOP architecture has been used to implemente a smart house demonstration. Six different systems has been integrated with local (802.11, 802.15.4) and global (telecom) communication. The six systems integrated are: Car arrival detection system, Garage door opening system, House security system, External house lightning system, External electrical outlet system, House energy control system. The SOA technologies used are CoAP and EXI using SenML to encode the services. Engineering tools have been used to simulate the usage scenario and provide prediction of system behaviour.

  • 254.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Eliasson, Jens
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Kyusakov, Rumen
    Punal, Pablo
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Mäkitaavola, Henrik
    Larsmark, Mikael
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Project: Arrowhead2014Annet (Annet (populærvitenskap, debatt, mm))
  • 255.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Eliasson, Jens
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Leijon, Viktor
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Latency and packet loss of an interferred 802.15.4 channel in an industrial environment2010Inngår i: Fourth International Conference on Sensor Technologies and Applications, SENSORCOMM, International Academy, Research and Industry Association (IARIA), 2010, s. 33-38Konferansepaper (Fagfellevurdert)
    Abstract [en]

    There is currently a rapid development of new types of wireless communication channels for industrial automation. This paper aims to provide some experimental data and theoretical justification on packet latency and packet loss for a wireless communication channel exposed to intentional radio interference. The intentional radio interference used in the experiments is an attempt to simulate possible future co-existence scenarios in a dense wireless communication environment at an industrial site. For the cases tested packet loses of less than 10% was obtained. Latency is shown to depend on channel access and will has a deterministic behaviour.

  • 256.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindblom, Jerry
    Sjölund, Daniel
    Luleå tekniska universitet.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Real time wireless measurement of mechanical data for a javelin throw2005Inngår i: Proceedings of the 13th Nordic-Baltic Conference of BioMedical Engineering and Medical Physics: NBC'05 / [ed] R Lundström; B Andersson; H Grip, Swedish Society for Medical Engineering and Medical Physics , 2005, s. 134-135Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Technology for the real time measurement of mechanical data from a javelin throw has been developed. The javelin is instrumented with an ineartial measurement unit measuring, IMU, acceleration, angle speed and direction to the earth magnetic field all in three dimensions i.e. in total nine parameters. The IMU is buildt into the javelin still maintaining the javelin properties and keeping it within the IAAF specifications. The instrumentation is build using the EIS architecture thus incorporating TCP/IP support including an Internet server. The wireless communication technology choosen is Bluetooth that connects to Internet through either a Bluetooth enabled mobile phone or a stationary Bluetooth accesspoint

  • 257.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Mobile Internet enabled sensors using mobile phones as access network2003Inngår i: Concurrent Engineering: the vision for the future generation in research and applications : proceedings of the 10th ISPE International Conference on Concurrent Engineering : research and applications / [ed] R. Jardim-Gonçalves; Jianzhong Cha; Adolfo Steiger-Garção, Lisse: Balkema Publishers, A.A. / Taylor & Francis The Netherlands , 2003, s. 741-746Konferansepaper (Fagfellevurdert)
    Abstract [en]

    We envision ambient intelligent environments with an infrastructure based on heterogeneous sensor and actuator devices accessible over the Internet. Initial steps to realize this concept have been taken by developing an Embedded Internet System (EIS) architecture for Internet protocol enabled devices. In many cases these devices will be in close proximity to a person. Such applications are found in for example sport and wellness. The mobile connection of such devices to the global Internet in a simple and cheap way is of particular interest. It is here proposed that such connection will make use of the existing and wide spread mobile phone networks. Since a few years most new mobile phones are equipped with Bluetooth technology making a mobile phone capable of connecting to 7 other Bluetooth devices. Thus by giving EIS devices a Bluetooth communication channel it will become possible to tunnel the EIS sensor communication through a mobile phone nearby the sensor. The proposed architecture will be described with discussion on limitations due to existing infrastructures and business models in the telecom networks.

  • 258.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Sensor communication technology towards ambient intelligence2005Inngår i: Measurement science and technology, ISSN 0957-0233, E-ISSN 1361-6501, Vol. 16, nr 4, s. R37-R46Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper is a review of the fascinating development of sensors and the communication of sensor data. A brief historical introduction is given, followed by a discussion on architectures for sensor networks. Further, realistic specifications on sensor devices suitable for ambient intelligence and ubiquitous computing are given. Based on these specifications, the status and current frontline development are discussed. In total, it is shown that future technology for ambient intelligence based on sensor and actuator devices using standardized Internet communication is within the range of possibilities within five years.

  • 259.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Östmark, Åke
    Mobile Internet enabled sensors using mobile phones as access network2004Inngår i: Electronic journal of information technology in construction, ISSN 1403-6835, E-ISSN 1400-6529, Vol. 9, nr Special Issue Mobile Computing in Construction, s. 381-388Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    We envision ambient intelligent environments with an infrastructure based on heterogeneous sensor and actuator devices accessible over the Internet. Initial steps to realize this concept have been taken by developing an Embedded Internet System (EIS) architecture for Internet protocol enabled devices. In many cases these devices will be in close proximity to a person. Such applications are found in for example sport and wellness. The mobile connection of such devices to the global Internet in a simple and cheap way is of particular interest. It is here proposed that such connection will make use of the existing and wide spread mobile phone networks. Since a few years most new mobile phones are equipped with Bluetooth technology making a mobile phone capable of connecting to 7 other Bluetooth devices. Thus by giving EIS devices a Bluetooth communication channel it will become possible to tunnel the EIS sensor communication through a mobile phone nearby the sensor. The proposed architecture will be described with discussion on limitations due to existing infrastructures and business models in the telecom networks.

  • 260.
    Delsing, Jerker
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    van Deventer, Jan
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Derhamy, Hasan
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Eliasson, Jens
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Varga, Pal
    Budapest University of Technology and Economics, Dept. of Telecommunications and Media Informatics, Budapest, Hungary.
    Enabling IoT automation using local clouds2016Inngår i: Proceedings IEEE World Forum on Internet of Things, Piscataway, NJ: IEEE Computer Society Digital Library, 2016, s. 501-507, artikkel-id 7845474Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Various forms of cloud computing principles and technologies are becoming important recently. This paper ad- dresses cloud computing for automation and control applications. It’s argued that the open Internet cloud idea has such limitations that its not appropriate for automation.

    Since automation is physically and geographically local, it is inevitable to introduce the concept of local automation clouds. It’s here proposed that local automation clouds should be self contained an be able to execute the intended automation func- tionalities without any external resources. Thus providing a fence at the rim of the local cloud preventing any inbound or outbound communication. Such a local cloud provides possibilities to address key requirements of both todays and future automation solutions. Adding mechanisms for secure inter-cloud administra- tion and data tranfere enables local automation cloud to meet IoT automation system requirements as: 1) Interoperability of a wide range of IoT and legacy devices 2) Automation requirement on latency guarantee/prediction for communication and control computations. 3) Scalability of automation systems enabling very large integrated automation systems 4) Security and related safety of automation systems 5) Ease of application engineering 6) Multi stakeholder integration and operations agility.

    How these requirements can be met in such a local automation cloud is discussed with references to proposed solutions. The local automation cloud concept is further verified for a compartment climate control application. The control application included an IoT controller, four IoT sensors and actuators, and a physical layer communication gateway. The gateway acted as host for local cloud core functionalities. The climate control application has successfully been implemented using the open source Arrowhead Framework and its supports for design and implementation of self contained local automation clouds.

  • 261.
    Dersten, Sara
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Axelsson, Jakob
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Fröberg, Joakim
    Mälardalens högskola, Akademin för innovation, design och teknik.
    An empirical study of refactoring decisions in embedded software and systems2012Inngår i: Procedia Computer Science, ISSN 1877-0509, E-ISSN 1877-0509, Vol. 8, s. 279-284Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper describes an empirical study of decision-making when changing the architecture in embedded systems. A refactoring of the system architecture often gives effects on both system properties and functions in the company organization, and there is a lack of efficient analysis methods for decision support in the system architecture process. This study investigates the information needed to make a decision about a system refactoring. Scenario-based interviews have been conducted with managers and system architects from companies developing embedded systems. The results show that the companies investigate similar issues regardless of their industry sector. The most wanted information prior to a decision is also presented.

  • 262.
    Dersten, Sara
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Axelsson, Jakob
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Fröberg, Joakim
    Mälardalens högskola, Akademin för innovation, design och teknik.
    Characteristics of a System Refactoring Process in Embedded Systems Development2012Konferansepaper (Fagfellevurdert)
  • 263.
    Desai, Ankush
    et al.
    University of California, Berkeley.
    Seshia, Sanjit A.
    University of California, Berkeley.
    Qadeer, Shaz
    Microsoft Research.
    Broman, David
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Programvaruteknik och Datorsystem, SCS. University of California, Berkeley.
    Eidson, John C.
    University of California, Berkeley.
    Approximate synchrony: An abstraction for distributed almost-synchronous systems2015Inngår i: Proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, Springer, 2015, s. 429-448Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Forms of synchrony can greatly simplify modeling, design, and verification of distributed systems. Thus, recent advances in clock synchronization protocols and their adoption hold promise for system design. However, these protocols synchronize the distributed clocks only within a certain tolerance, and there are transient phases while synchronization is still being achieved. Abstractions used for modeling and verification of such systems should accurately capture these imperfections that cause the system to only be “almost synchronized.” In this paper, we present approximate synchrony, a sound and tunable abstraction for verification of almost-synchronous systems. We show how approximate synchrony can be used for verification of both time synchronization protocols and applications running on top of them. We provide an algorithmic approach for constructing this abstraction for symmetric, almost-synchronous systems, a subclass of almost-synchronous systems. Moreover, we show how approximate synchrony also provides a useful strategy to guide state-space exploration. We have implemented approximate synchrony as a part of a model checker and used it to verify models of the Best Master Clock (BMC) algorithm, the core component of the IEEE 1588 precision time protocol, as well as the time-synchronized channel hopping protocol that is part of the IEEE 802.15.4e standard.

  • 264.
    Di Orio, Giovanni
    et al.
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Rocha, Andre
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    Ribeiro, Luis
    Linköpings universitet, Institutionen för ekonomisk och industriell utveckling, Industriell Produktion. Linköpings universitet, Tekniska fakulteten.
    Barata, Jose
    Dept. of Electrotechnical Engineering CTS – UNINOVA, Portugal.
    The PRIME Semantic Language: Plug and Produce in Standard- based Manufacturing Production Systems2015Inngår i: Proceedings of the Flexible Automation and Intelligent Manufacturing Conference, 2015Konferansepaper (Annet vitenskapelig)
    Abstract [en]

    Nowadays manufacturing production systems are becoming more and more responsive in order to succeed in ahighly unstable environment. The capability of a production system to effectively and efficiently adapt and evolveto face the changing requirements – imposed by volatile and dynamic global markets – is a necessary conditionto enable manufacturing enterprises to be agile. Since the agility of a manufacturing enterprise is always limitedby the agility of its own building blocks than it needs to be spread over the whole enterprise including the operationand information technologies (OT/IT). Turning to production systems, one of the significant challenges isrepresented by the possibility to provide easy and rapid (re-)configuration of their internal components and/orprocesses. Innovative technologies and paradigms have been explored during the years that combined with theincreasing advancement in manufacturing technologies enable the implementation of the “plug and produce”paradigm. The “plug and produce” paradigm is the foundation of any agile production system, since to be agile itis inevitably required to reduce the installation and (re-)engineering activities time – changing/adapting the systemto new requirements – while promoting configuration rather than programming. Therefore, the “plug andproduce” paradigm is a necessary but not sufficient condition for implementing agile production systems. Modernproduction systems are typically known for their plethora of heterogeneous component/equipment. In this complexscenario, the implementation of the “plug and produce” paradigm implies the existence of a well-definedontological model to support components/equipment abstraction with the objective to allow interactions,collaboration and knowledge sharing between them. The PRIME semantic language specifies the semanticstructure for the knowledge models and overall system communication language.

  • 265.
    di Tommaso, P.
    et al.
    Ansaldo Signal, Italy.
    Flammini, Francesco
    Ansaldo Signal, Italy.
    Lazzaro, A.
    Ansaldo Signal, Italy.
    Pellecchia, R.
    Ansaldo Signal, Italy.
    Sanseviero, A.
    Ansaldo Signal, Italy.
    The simulation of anomalies in the functional testing of the ERTMS/ETCS trackside system2005Inngår i: HASE 2005 : Ninth IEEE International Symposium on High Assurance Systems Engineering: 12-14 October 2005, Heidelberg, Germany, Heidelberg: Springer, 2005, s. 131-139Konferansepaper (Fagfellevurdert)
    Abstract [en]

    ERTMS/ETCS is going to become the reference standard for modern railway signalling. To develop a safe and reliable Automatic Train Protection System (ATPS) based on ERTMS/ETCS, a detailed functional testing phase is needed, meeting the requirements of international railway safety standards. In this paper we deal with the functional validation of the trackside part of an ERTMS/ETCS compliant system. An extensive set of functional tests have been specified in order to thoroughly verify the system, using an innovative approach based on influence variables and state diagrams. However, such a detailed test specification requires a great amount of time and resources to be entirely executed in the real environment. Moreover, several tests need to generate abnormal safety-critical conditions that are unfeasible on the field. In this paper we describe how we overcame such problems using a specific simulation environment capable to quickly and automatically execute anomaly tests in normal as well as in degraded operating conditions.

  • 266. Diallo, P. I.
    et al.
    Attarzadeh-Niaki, Seyed Hosein
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Robino, Francesco
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Sander, Ingo
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    Champeau, J.
    Öberg, Johnny
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
    A formal, model-driven design flow for system simulation and multi-core implementation2015Inngår i: 2015 10th IEEE International Symposium on Industrial Embedded Systems, IEEE , 2015, s. 254-263Konferansepaper (Fagfellevurdert)
    Abstract [en]

    With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.

  • 267.
    Didic, Alma
    et al.
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Nikolaidis, Pavlos
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Real-time control in industrial IoT2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    Great advances in cloud computing have drawn the interest of industry. Cloud infrastructures areused, mainly, for monitoring the shop oor. In recent years cloud technologies combined with IoTtechnologies have initiated the eort to close loops between industrial applications and cloud infras-tructures. This thesis examines the eect of including remote servers, both local and centralized,in the closed control loop. Specically, we investigate how delays and jitter aect the closed controlloop. A prototype is developed to include servers on a control loop and inject delays and jitter inthe network. Furthermore, delay mitigation mechanisms are proposed and, using the prototype, anumber of experiments are performed to evaluate them. The mitigation mechanisms focus mainlyon delays and jitter that are larger than the period of closed control loop. The proposed mechanismsimprove the closed control loop response but still fall short compared to the performance of the closecontrol loop when it executes locally, without any servers included. We also, show that local serverscan be included in the closed control loop without signicant degradation in the performance of thesystem.

  • 268.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Locating type errors in untyped CLP programs2000Inngår i: Analysis and Visualization Tools for Constraint Programming: Constraint Debugging, Berlin: Encyclopedia of Global Archaeology/Springer Verlag, 2000, s. 121-150Kapittel i bok, del av antologi (Annet vitenskapelig)
    Abstract [en]

    This chapter presents a static diagnosis tool that locates type errors in untyped CLP programs without executing them. The existing prototype is specialised for the programming language CHIP [4.10], but the idea applies to any CLP language. The tool works with approximated specifications which describe types of procedure calls and successes. The specifications are expressed as a certain kind of term grammars. The tool automatically locates at compile time all the errors (with respect to a given specification) in a program. The located erroneous program fragments are (prefixes of) clauses. The tool aids the user in constructing specifications incrementally; often a fragment of the specification is already sufficient to locate an error. The presentation is informal. The focus is on the motivation of this work and on the functionality of the tool. Some related formal aspects are discussed in [4.15, 4.29]. The prototype tool is available from http://www.ida.liu.se/~pawpi/Diagnoser/diagnoser.html.

  • 269.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Parametric descriptive types for CLP2001Inngår i: Programmation en logique avec contraintes: actes des JFPLC'2001 [10e Journées francophones de programmation logique et programmation par contraintes], 24 avril-27 avril 2001, Cité des sciences et de l'industrie, Paris / [ed] Philippe Codognet, Paris: Hermés Science Publications , 2001, s. 239-256Konferansepaper (Fagfellevurdert)
  • 270.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Maluszynski, Jan
    University of Linköping.
    Pietrzak, Pawel
    Type-based diagnosis of CLP programs2000Inngår i: WLPE'99: Tenth Workshop on Logic Programming Environments, in connection with ICLP'99, International Conference on Logic Programming, Las Cruces, New Mexico, USA, 29 November 1999, Amsterdam: Elsevier, 2000Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The paper presents a diagnosis tool for CLP programs. It deals with partial correctness w.r.t. specifications which describe procedure calls and successes. The space of possible specifications is restricted to a kind of regular types; we propose a generalization of the concept of types used in so called descriptive typing of logic programs. In particular we distinguish ground types from those containing non-ground elements.The tool is able to automatically locate at compile time all errors in a program, this means all the clauses or clause prefixes responsible for the program being incorrect w.r.t. a given specification. The tool aids the user in constructing specifications incrementally; often a fragment of the specification is already sufficient to locate an error.Our prototype is specialized for the programming language CHIP, but the idea is applicable to any untyped CLP (and LP) language. We believe that the presented approach makes it possible to combine the advantages of typed and untyped programming languages.

  • 271.
    Drabent, Wlodek
    et al.
    Linköping University.
    Maluszynski, Jan
    Linköping University.
    Pietrzak, Pawel
    Using parametric set constraints for locating errors in CLP programs2002Inngår i: Theory and Practice of Logic Programming, ISSN 1471-0684, E-ISSN 1475-3081, Vol. 2, nr 4-5, s. 549-611Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper introduces a framework of parametric descriptive directional types for Constraint Logic Programming (CLP). It proposes a method for locating type errors in CLP programs, and presents a prototype debugging tool. The main technique used is checking correctness of programs w.r.t. type specifications. The approach is based on a generalization of known methods for proving the correctness of logic programs to the case of parametric specifications. Set constraint techniques are used for formulating and checking verification conditions for (parametric) polymorphic type specifications. The specifications are expressed in a parametric extension of the formalism of term grammars. The soundness of the method is proved, and the prototype debugging tool supporting the proposed approach is illustrated on examples. The paper is a substantial extension of the previous work by the same authors concerning monomorphic directional types.

  • 272.
    Drabent, Wlodek
    et al.
    University of Linköping.
    Pietrzak, Pawel
    Type analysis for CHIP1999Inngår i: Algebraic Methodology and Software Technology: 7th International Conference, AMAST'98 Amazonia, Brazil, January 4-8, 1999 Proceedings / [ed] Armando Martin Haeberer, Encyclopedia of Global Archaeology/Springer Verlag, 1999, s. 389-405Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper proposes a tool to support reasoning about (partial) correctness of constraint logic programs. The tool infers a specification that approximates the semantics of a given program. The semantics of interest is an operational "call-success" semantics. The main intended application is program debugging. We consider a restricted class of specifications, which are regular types of constrained atoms. Our type inference approach is based on bottom-up abstract interpretation, which is used to approximate the declarative semantics (c-semantics). By using "magic transformations" we can describe the call-success semantics of a program by the declarative semantics of another program. We are focused on CLP over finite domains. Our prototype program analyzer works for the programming language CHIP.

  • 273.
    Dreschler, Rolf
    et al.
    Department of Computer Science, University of Bremen.
    Kerttu, Mikael
    Luleå tekniska universitet.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Thornton, Mitchell
    Low-power optimization techniques for BDD mapped circuits using temporal correlation2002Inngår i: Canadian journal of electrical and computer engineering, ISSN 0840-8688, Vol. 27, nr 4Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Low-power optimization techniques for BDD mapped circuits using temporal correlation Techniques d'optimisation pour les faibles puissances pour des diagrammes de décision binaire utilisant la corrélation temporelle Rolf Drechsler, Mikael Kerttu, Per Lindgren, and Mitchell Thornton £ In modern design flows low-power aspects should be considered as early as possible to minimize power dissipation in the resulting circuit. A new binary decision diagram-based design style that considers switching activity optimization using temporal correlation information is presented. The technique is based on an approximation method for switching activity estimation. In the case of finite state machines, the presented method extracts signal statistics by means of Markov chain analyses. Experimental results on a set of MCNC and ISCAS89 benchmarks show the estimated reduction in power dissipation. Les aspects relatifs aux faibles puissances devraient être pris en compte dès les premières phases du design en vue de minimiser la dissipation de puissance du circuit résultant. Cet article présente une méthode de design basée sur un diagramme de décision binaire qui traite l'optimisation des commutations via l'information de corrélation temporelle. L'approche repose sur une approximation de l'estimation de l'activité decommutation. Dans le cas des machines àétats finis, la méthode extrait les statistiques du signal via une analyse par chaînes de Markov. Des résultats expérimentaux obtenus avec des données de banc d'essai MCNC et ISCAS89 montrent la réduction estimée de la dissipation de puissance

  • 274.
    Du, Rong
    et al.
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Fischione, Carlo
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Power Allocation for Channel Estimation and EnergyBeamforming in Wirelessly Powered Sensor Networks2018Inngår i: Proceedings of IEEE International Conference on Communications Workshops, 2018Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Wirelessly powered sensor networks (WPSNs) are becoming increasingly important to monitor many internet-of-things systems. In these WPSNs, dedicated base stations (BSs) with multiple antennas charge the sensor nodes without the need of replacing their batteries thanks to two essential procedures: i)  getting of the channel state information of the nodes by sending pilots, and based on this, ii) performing energy beamforming to transmit energy to the nodes. However, the BSs have limited power budget and thus these two procedures are not independent, contrarily to what  is assumed in some previous studies. In this paper, we investigate the novel problem of how to optimally allocate the power for channel estimation and energy transmission. Although the problem is non-convex, we provide a new solution approach and a performance analysis in terms of optimality and complexity. We also provide a closed form solution for the case where the channels are estimated based on a least square estimation. The simulations show a gain of approximately 10% in allocating the power optimally, and the importance of improving the channel estimation efficiency.

  • 275.
    Du, Rong
    et al.
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Ozcelikkale, Ayca
    Fischione, Carlo
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Nätverk och systemteknik.
    Xiao, Ming
    Towards Immortal Wireless Sensor Networks by Optimal Energy Beamforming and Data Routing2018Inngår i: IEEE Transactions on Wireless Communications, ISSN 1536-1276, E-ISSN 1558-2248, Vol. 17, nr 8, s. 5338-5352Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    The lifetime of a wireless sensor network (WSN) determines how long the network can be used to monitor the area of interest. Hence, it is one of the most important performance metrics for WSN. The approaches used to prolong the lifetime can be briefly divided into two categories: reducing the energy consumption, such as designing an efficient routing, and providing extra energy, such as using wireless energy transfer (WET) to charge the nodes. Contrary to the previous line of work where only one of those two aspects is considered, we investigate these two together. In particular, we consider a scenario where dedicated wireless chargers transfer energy wirelessly to sensors. The overall goal is to maximize the minimum sampling rate of the nodes while keeping the energy consumption of each node smaller than the energy it receives. This is done by properly designing the routing of the sensors and the WET strategy of the chargers. Although such a joint routing and energy beamforming problem is non-convex, we show that it can be transformed into a semi-definite optimization problem (SDP). We then prove that the strong duality of the SDP problem holds, and hence the optimal solution of the SDP problem is attained. Accordingly, the optimal solution for the original problem is achieved by a simple transformation. We also propose a low-complexity approach based on pre-determined beamforming directions. Moreover, based on the alternating direction method of multipliers (ADMM), the distributed implementations of the proposed approaches are studied. The simulation results illustrate the significant performance improvement achieved by the proposed methods. In particular, the proposed energy beamforming scheme significantly out-performs the schemes where one does not use energy beamforming, or one does not use optimized routing. A thorough investigation of the effect of system parameters, including the number of antennas, the number of nodes, and the number of chargers, on the system performance is provided. The promising convergence behaviour of the proposed distributed approaches is illustrated.

  • 276.
    Du, Yong
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    Online Admission Control for Multi-Switch Ethernet Networks2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    The trend of using switched Ethernet protocols in real-time domains, where timing requirements exist, is increasing. This is mainly because of the features of switched Ethernet, such as its high throughput and availability. Compared to other network technologies, switched Ethernet can support higher data rate. Besides the timing requirements, that must be fulfilled in real-time applications, another requirement is normally demanded in real-time systems. This requirement is the ability of changing, adding or removing the messages crossing the network during run-time. This ability is known as on-line reconfiguration, and it should be done in a way that the real-time behavior of the network is not violated. This means that, the guarantee of meeting the timing requirements for the messages should not be affected by the changes in the network. In this thesis, we focus on on-line reconfiguration for multi-hop HaRTES architecture, which is a real-time switched Ethernet network. The HaRTES switch is a modified Ethernet switch that provides real-time guarantees as well as an admission control to be used for on-line reconfiguration. We study the existing reconfiguration methods including centralized and distributed approaches. Then, we propose a solution to provide on-line reconfiguration for the multi-hop HaRTES architecture, based on the studied methods. For this purpose, we use a hybrid method to achieve the advantages of both traditional centralized and distributed approaches. Moreover, we perform two different experiments. In the first experiment we focus on the decision making part of the method. The decision making part decides whether the requested reconfiguration is feasible. We calculate the time required to make the decision in different network settings. In the second experiment, we focus on the entire reconfiguration process, where the decision making is part of it. Again, we show the time needed to do the reconfiguration in several network settings. Finally, we conclude the thesis by presenting possible future works

  • 277.
    Duff, Gerard
    Mälardalens högskola, Akademin för innovation, design och teknik, Inbyggda system.
    App enabling environment for Volvo CE platforms2015Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
  • 278.
    Duff, Gerard
    Mälardalens högskola, Akademin för innovation, design och teknik.
    App enabling environment to Volvo CE platforms2014Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    This thesis was submitted to the faculty of Innovation, Design and Technology, IDT, at Mälardalen university in Västerås, Sweden as a partial fulfillment of the requirements to obtain the M.Sc. in computer science, specializing in embedded systems. The work presented was carried out in the months January to June in 2014 partially in Volvo Construction Equipment, Volvo CE, Eskilstuna, and partially at Mälardalen university in Västerås.

    Federated Resilient Embedded Systems Technology for AUTOSAR, FRESTA, is a collaborative project between Volvo and the Swedish Institute of Computer Science, SICS, that aims to make it possible to add third party applications to vehicle’s computer systems without compromising system security and robustness. The mechanism is developed by SICS for AUTOSAR, AUTomotive Open System ARchitecture, an open standardized automotive software architecture for vehicles.

    The following report documents the efforts to study and port the FRESTA mechanism to the Volvo CE platform, and develop a Java application to test the porting. The investigation will aspire to determine if it is feasible to introduce Java based third party applications to resource constrained embedded systems, without causing a deterioration in the predictability and security of the system.

  • 279.
    Dugani, Vishwanath
    KTH, Skolan för elektroteknik och datavetenskap (EECS), Centra, Parallelldatorcentrum, PDC. KTH, Skolan för datavetenskap och kommunikation (CSC).
    Continuous system-wide profiling of High Performance Computing parallel applications: Profiling high performance applications2016Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    Profiling of an application identifies parts of the code being executed using the hardware performance counters thus providing the application’s performance. Profiling has long been standard in the development process focused on a single execution of a single program. As computing systems have evolved, understanding the bigger picture across multiple machines has become increasingly important. As supercomputing grows in pervasiveness and scale, understanding parallel applications performance and utilization characteristics is critically important, because even minor performance improvements translate into large cost savings. The study surveys various tools for the application. After which, Perfminer was integrated in SCANIA’s Linux clusters to profile CFD and FEA applications exploiting the batch queue system features for continuous system wide profiling, which provides performance insights for high performance applications, with negligible overhead. Perfminer provides stable, accurate profiles and a cluster-scale tool for performance analysis. Perfminer effectively highlights the micro-architectural bottlenecks.

  • 280.
    Duracz, Adam
    et al.
    Rice University, Houston, TX, United States.
    Moggi, Eugenio
    DIBRIS, Genova University, Genova, Italy.
    Taha, Walid
    Högskolan i Halmstad, Akademin för informationsteknologi, Halmstad Embedded and Intelligent Systems Research (EIS), Centrum för forskning om inbyggda system (CERES).
    Lin, Zhenchao
    Zhejiang University, Hangzhou, China.
    A Semantic Account of Rigorous Simulation2018Inngår i: Principles of Modeling: Essays Dedicated to Edward A. Lee on the Occasion of His 60th Birthday / [ed] Marten LohstrohPatricia DerlerMarjan Sirjani, Amsterdam: Springer Berlin/Heidelberg, 2018, Vol. 10760, s. 223-239Kapittel i bok, del av antologi (Fagfellevurdert)
    Abstract [en]

    Hybrid systems are a powerful formalism for modeling cyber-physical systems. Reachability analysis is a general method for checking safety properties, especially in the presence of uncertainty and non-determinism. Rigorous simulation is a convenient tool for reachability analysis of hybrid systems. However, to serve as proof tool, a rigorous simulator must be correct w.r.t. a clearly defined notion of reachability, which captures what is intuitively reachable in finite time. As a step towards addressing this challenge, this paper presents a rigorous simulator in the form of an operational semantics and a specification in the form of a denotational semantics. We show that, under certain conditions about the representation of enclosures, the rigorous simulator is correct. We also show that finding a representation satisfying these assumptions is non-trivial. © 2018, Springer International Publishing AG, part of Springer Nature.

  • 281.
    Düring, Morgan
    et al.
    KTH, Tidigare Institutioner, Mikroelektronik och informationsteknik, IMIT.
    Lindvall, Stefan
    Mehlqvist, Dan
    Öberg, Johnny
    The ProGram Compiler2003Inngår i: University Booth, DATE 2003 conference, 2003Konferansepaper (Fagfellevurdert)
  • 282. Ebrahimi, Masoumeh
    Fully adaptive routing algorithms and region-based approaches for two-dimensional and three-dimensional networks-on-chip2013Inngår i: IET Computers & Digital Techniques, ISSN 1751-8601, E-ISSN 1751-861X, ISSN 1751-8601, nr 6, s. 264-273Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Network congestion has negative impact on the performance of networks-on-chip (NoC). In traditional congestionawaretechniques, congestion is measured at a router level and delivered to other routers, either local or non-local. One of thecontributions of this study is to show that performance can be improved if the congestion level is measured for a group ofrouters, called cluster, and propagated over the network, rather than considering the congestion level of a single router. Thepresented approach is discussed in both two-dimensional (2D) and three-dimensional (3D) mesh networks. To collect andpropagate the congestion information of different clusters, a distributed approach is presented. The gathered information isutilised at routing units to deliver packets through the less congested regions. To distribute packets over the network withoutforming deadlock, routing algorithms should be carefully designed. The authors take advantage of fully adaptive routingalgorithms, providing the maximum degree of adaptiveness for distributing packets. For 2D NoCs, a conventional fullyadaptive routing algorithm, named dynamic XY (DyXY), is utilised. However, for 3D NoCs a fully adaptive routingalgorithm is proposed and this method is called 3D-FAR. On top of each fully adaptive routing algorithm, a region-basedapproach is developed.

  • 283. Ebrahimi, Masoumeh
    et al.
    Daneshtalab, Masoud
    A Light-weight fault-tolerant routing algorithm tolerating faulty links and routers2013Inngår i: Computing, ISSN 0010-485X, E-ISSN 1436-5057, Vol. 97, s. 631-648Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Faults at either the link or router level may result in the failure of the system. Fault-tolerant routing algorithms attempt to tolerate faults by rerouting packets around the faulty region. This rerouting would be at the cost of significant performance loss. The proposed algorithm in this paper is able to tolerate both faulty routers and links with negligible impact on the performance. In fact, the proposed algorithm avoids taking unnecessary longer paths and the shortest paths are always taken as long as a path exists. On the other hand, fault-tolerant routing algorithms might be based on deterministic routing in which all packets use a single path between each pair of source and destination routers. Using deterministic routing, packets reach the destination in the same order they have been delivered from the source so that no reordering buffer is needed at the destination. For improving the performance, fault-tolerant algorithms might be based on adaptive routing in which packets are delivered through multiple paths to destinations. In this case, packets should be reordered at the destinations demanding reordering buffers. The proposed algorithm can be configured in both working modes, such that it can be based on deterministic or adaptive routing.

  • 284. Ebrahimi, Masoumeh
    et al.
    Daneshtalab, Masoud
    Liljeberg, Pasi
    Plosila, Juha
    Flich, Jose
    Tenhunen, Hannu
    Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing2014Inngår i: I.E.E.E. transactions on computers (Print), ISSN 0018-9340, E-ISSN 1557-9956, Vol. 63, nr 3, s. 718-733Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Combining the benefits of 3D ICs and Networks-on-Chip (NoCs) schemes provides a significant performance gain in ChipMultiprocessors (CMPs) architectures. As multicast communication is commonly used in cache coherence protocols for CMPs and invarious parallel applications, the performance of these systems can be significantly improved if multicast operations are supported at thehardware level. In this paper, we present several partitioning methods for the path-based multicast approach in 3D mesh-based NoCs,each with different levels of efficiency. In addition, we develop novel analytical models for unicast and multicast traffic to explore theefficiency of each approach. In order to distribute the unicast and multicast traffic more efficiently over the network, we propose theMinimal and Adaptive Routing (MAR) algorithm for the presented partitioning methods. The analytical and experimental results show thatan advantageous method named Recursive Partitioning (RP) outperforms the other approaches. RP recursively partitions the networkuntil all partitions contain a comparable number of switches and thus the multicast traffic is equally distributed among several subsetsand the network latency is considerably decreased. The simulation results reveal that the RP method can achieve performanceimprovement across all workloads while performance can be further improved by utilizing the MAR algorithm. Nineteen percent averageand 42 percent maximum latency reduction are obtained on SPLASH-2 and PARSEC benchmarks running on a 64-core CMP.

  • 285.
    Ebrahimi, Masoumeh
    et al.
    KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System. Department of Information Technology, University of Turku, Finland .
    Daneshtalab, Masoud
    Plosila, Juha
    Fault-tolerant routing algorithm for 3D NoC using hamiltonian path strategy2013Inngår i: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 2013, s. 1601-1604Konferansepaper (Fagfellevurdert)
    Abstract [en]

    While Networks-on-Chip (NoC) have been increasing in popularity with industry and academia, it is threatened by the decreasing reliability of aggressively scaled transistors. In this paper, we address the problem of faulty elements by the means of routing algorithms. Commonly, fault-tolerant algorithms are complex due to supporting different fault models while preventing deadlock. When moving from 2D to 3D network, the complexity increases significantly due to the possibility of creating cycles within and between layers. In this paper, we take advantages of the Hamiltonian path to tolerate faults in the network. The presented approach is not only very simple but also able to support almost all one-faulty unidirectional links in 2D and 3D NoCs.

  • 286.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, MartinKTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    ACM SIGBED Review: Special Issue on Embedded and Cyber-Physical Systems Education2016Collection/Antologi (Fagfellevurdert)
  • 287.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, MartinKTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Proceedings of the Workshop on Embedded Systems Education, WESE2014, New Delhi, India2014Konferanseproceedings (Fagfellevurdert)
  • 288.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, MartinKTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Maskinkonstruktion (Avd.). KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Inbyggda styrsystem. KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Proceedings of the Workshop on Embedded Systems Education, WESE2015, Amsterdam, Netherlands2015Konferanseproceedings (Fagfellevurdert)
  • 289.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, Martin
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Inbyggda styrsystem.
    Towards a curricula for Cyber-Physical Systems2014Inngår i: Proceedings of the Workshop on Embedded Systems Education, WESE2014, New Delhi, India, ACM Digital Library, 2014Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Embedded and Cyber-Physical Systems education faces several challenges as well as opportunities as every-"thing" becomes connected, and as technology development accelerates. Initiatives such as CDIO, as well as several other academic and industry initiatives to create new CPS programs illustrate strong interests and awareness of these challenges. We provide an overview of foreseen educational needs, existing state of the art in education and an analysis of the subject of CPS with the purpose of understanding the implications for education. The investigation points to key issues in curriculum design regarding balancing depth and breadth, theory and practices, academic and industrial needs, and core technical skills with complementary skills. Curricula in CPS could, if the right balance is achieved, educate CPS engineers of the future that are "ready to engineer".

  • 290.
    Edin Grimheden, Martin
    et al.
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Törngren, Martin
    KTH, Skolan för industriell teknik och management (ITM), Maskinkonstruktion (Inst.), Mekatronik.
    Gustafsson, Jonas
    Birk, Wolfgang
    Strategies and considerations in shaping cyber-physical systems education2016Inngår i: ACM SIGBED Review, ISSN 1551-3688, nr 1, s. 53-60Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Embedded and Cyber-Physical Systems education faces several challenges as well as opportunities as every-“thing” becomes connected, and as technology development accelerates. Initiatives such as CDIO, as well as several other academic and industry initiatives to create new CPS programs illustrate strong interests and awareness of these challenges. We provide an overview of foreseen educational needs, existing state of the art in education and an analysis of the subject of CPS with the purpose of understanding the implications for education. The investigation points to key issues in curriculum design regarding balancing depth and breadth, theory and practices, academic and industrial needs, and core technical skills with complementary skills. Curricula in CPS could, if the right balance is achieved, educate CPS engineers of the future that are “ready to engineer”. We conclude by synthesizing high level guidelines in terms of strategies and considerations for CPS curriculum development.

  • 291.
    Edlund, Fredrik
    et al.
    KTH, Skolan för teknik och hälsa (STH), Medicinsk teknik, Data- och elektroteknik.
    Sarker, Saqib
    KTH, Skolan för teknik och hälsa (STH), Medicinsk teknik, Data- och elektroteknik.
    Smart Kitchen: Automatisk inventering av föremål2016Independent thesis Basic level (university diploma), 10 poäng / 15 hpOppgave
    Abstract [sv]

    Internet of Things växer fort och förutspås bli en del av vardagen. Detta öppnar möjligheter för att skapa produkter som förenklar vardagslivet. Automatisk objektsidentifiering kombinerad med en automatiserad lagerstatus kan underlätta inventering, något som kan användas till exempel i smarta kylskåp för att göra vardagen enklare genom Internet of Things.Detta examensarbete studerar metoder inom objektsidentifikation för att ta fram ett system som automatiskt kan identifiera objekt och hantera lagerstatus. En prototyp framställdes och testades för att se vilka möjligheter som finns. Systemet använder en Raspberry Pi som basenhet, vilken använder Dlib-bibliotek för att identifiera objekt som har blivit fördefinierade. Vid okända objekt identifierar användaren objekt i en mobilapplikation, systemet kan genom detta lära sig identifiera nya objekt. Samma applikation används för att se lagerstatusen på de olika objekt som har registrerats av systemet. Prototypen klarar av att identifiera kända objekt samt att lära sig nya, enligt projektets mål.

  • 292.
    Edström, Urban
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik. Centrum för medicinsk teknik och strålningsfysik.
    Nackvinkelmätningar vid thoraxoperation: Kan prismaglasögon underlätta arbetet för operationssjuksköterskor?2017Independent thesis Advanced level (degree of Master (One Year)), 40 poäng / 60 hpOppgave
  • 293.
    Edström, Urban
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik.
    Nackvinkelmätningar vid thoraxoperation: Kan prismaglasögon underlätta arbetet för operationssjuksköterskor?2017Independent thesis Advanced level (degree of Master (One Year)), 20 poäng / 30 hpOppgave
  • 294.
    Edvinsson, Nils
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper.
    Energy harvesting power supply for wireless sensor networks: Investigation of piezo- and thermoelectric micro generators2013Independent thesis Basic level (degree of Bachelor), 10 poäng / 15 hpOppgave
    Abstract [en]

    Computers and their constituent electronics continue to shrink. The same amount of work can be done with increasingly smaller and cheaper components that need less power to function than before. In wireless sensor networks, the energy needed by one sensor node borders the amount that is already present in its immediate surroundings. Equipping the electronics with a micro generator or energy harvester gives the possibility that it can become self-sufficient in energy.

    In this thesis two kinds of energy harvesters are investigated. One absorbs vibrations and converts them into electricity by means of piezo-electricity. The other converts heat flow through a semiconductor to electricity, utilizing a thermoelectric effect. Principles governing the performance, actual performance of off-the-shelf components and design considerations of the energy harvester have been treated. The thermoelectric micro generator has been measured to output power at 2.7 mW and 20°C with a load of 10 W. The piezoelectric micro generator has been measured to output power at 2.3 mW at 56.1 Hz, with a mechanical trim weight and a load of 565 W. In these conditions the power density of the generators lies between 2-3 W/m2.

  • 295.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Area Efficient Floating-Point Adder and Multiplier with IEEE-754 Compatible Semantics2014Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we describe an open source floating-point adder andmultiplier implemented using a 36-bit custom number format based onradix-16 and optimized for the 7-series FPGAs from Xilinx. Althoughthis number format is not identical to the single-precision IEEE-754format, the floating-point operators are designed in such a way thatthe numerical results for a given operation will be identical to theresult from an IEEE-754 compliant operator with support forround-to-nearest even, NaNs and Infs, and subnormalnumbers. The drawback of this number format is that the rounding stepis more involved than in a regular, radix-2 based operator. On theother hand, the use of a high radix means that the area costassociated with normalization and denormalization can be reduced,leading to a net area advantage for the custom number format, underthe assumption that support for subnormal numbers is required.

    The area of the floating-point adder in a Kintex-7 FPGA is 261 sliceLUTs and the area of the floating-point multiplier is 235 slice LUTsand 2 DSP48E blocks. The adder can operate at 319 MHz and themultiplier can operate at a frequency of 305 MHz.

  • 296.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    EBRAM - Extending the BlockRAMs in FPGAs to support caches and hash tables inan efficient manner2012Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In this paper we discuss how a typical Block RAM in an FPGA can be extended to enable the implementation of more efficient caches in FPGAs with very minor modifications to the existing Block RAM architectures. In addition, the modifications also allow other components, such as hash tables, to be implemented more efficiently.

  • 297.
    Ehliar, Andreas
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Optimizing Xilinx designs through primitive instantiation2010Inngår i: FPGAworld '10 Proceedings of the 7th FPGAworld Conference, New York: ACM , 2010, s. 20-27Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper is intended as a guideline for people who are interested in manual instantiation of FPGA primitives as a way of improving the performance of an FPGA design. The focus of the paper is on designs where slice primitives like flip-fops and lookup tables are instantiated. Guidelines on how to develop a design with manual instantiation are presented together with a case study of a high performance bitserial two's complement divider where a majority of the area is manually instantiated. This divider is capable of reaching a maximum frequency of 345 MHz in the fastest Virtex-4 while utilizing less than 150 LUTs thanks to the high amount of manual optimizations. An open source library containing modules intended to promote the structured development of modules with manually instantiated components is also presented.

  • 298.
    Ehliar, Andreas
    et al.
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Siverskog, Jacob
    Linköpings universitet, Institutionen för systemteknik, Datorteknik. Linköpings universitet, Tekniska högskolan.
    Using Partial Reconfigurability to aid Debugging of FPGA Designs2011Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper discusses the use of partial reconfigurability in Xilinx FPGA designs in order to aid debugging. A debugging framework is proposed where the use of partial reconfigurability can allow for added flexibility by allowing a debugger to decide at run time what debugging module to use. This paper also presents an open source debugging tool which allows a user to read-out the contents of memory blocks in Xilinx designs without needing to use any JTAG adapter. This allows a user to debug an FPGA in situations which would otherwise be difficult, i.e. in the field.

  • 299.
    Eilertsen, Svein Morten
    et al.
    Bioforsk Nord Tjøtta.
    Karlsson, Johannes
    Umeå universitet, Teknisk-naturvetenskapliga fakulteten, Institutionen för tillämpad fysik och elektronik.
    Electronically sensors system to warn drivers if a reindeer is close to the road or the railway2014Inngår i: Nordic Association of Agricultural Scientists: NJF Report, 2014, Vol. 10, s. 30-30Konferansepaper (Fagfellevurdert)
    Abstract [en]

    In Norway, Sweden and Finland approximately 9.000 reindeer are killed every year in traffic accidents (road and railway). In field experiments two different electronically sensor system were used. The purpose is to warn car drivers and railway engineers that reindeer are close to, or on the traffic system, and reduce the numbers of accident. The information system developed by Telespor is based on GPS/GSM radio collars. These collars use SMS to inform that the reindeer are close to the traffic system. In addition to the warning, the reindeer owners get information about the reindeer land use throughout the whole year. The collars are expensive (approx. 250 euros/unit) and need battery change every year. At Umeå University a system based on wireless sensor nodes attached to the reindeer collars is developed. This node will send out a periodic warning radio beacon. On road sticks a warning device will be attached containing a radio receiver and LED flashlights that will warn if a radio beacon is received. To further increase the warning distance it is possible to use communication between the roadside warning devices and let several devices flash their LED lights when a reindeer is detected. The radio collar (approx. 15 euros/unit) will have a theoretical battery life of more than 10 years. The radio range is around 500 meters between the radio collar and the roadside warning device, which is more than sufficient.

  • 300.
    Ekman, Jonas
    et al.
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Borg, Johan
    Johansson, Jonny
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindgren, Per
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    De Lauretis, Maria
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Lindner, Marcus
    Luleå tekniska universitet, Institutionen för system- och rymdteknik, EISLAB.
    Nilsson, Joakim
    Projekt: Frekvensomriktares funktion i beredskapskritiska system2014Annet (Annet (populærvitenskap, debatt, mm))
    Abstract [sv]

    Vid dödnätstart av produktionsanläggningar och drift av svaga nät eller ö-drift är frekvensomriktare som driver pumpar och fläktar kritiska komponenter. Om frekvensomriktare påverkas av störningar i nätet kan elproduktion kopplas bort och det svaga nätet eller ö-driften kollapsa. Projektet ska studera frekvensomriktare ur ett antal aspekter såsom uppbyggnad, styrning och implementering i syfte att utveckla mer robusta frekvensomriktare och implementering av dessa för att säkerställa drift av svaga nät och ö-drift och minimera ytterligare driftstörningar vid svåra påfrestningar på elnätet.

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