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  • 1. Adiseno,
    et al.
    Ismail, Mohammed
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    A wide-band RF front-end for multiband multistandard high-linearity low-IF wireless receivers2002In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, E-ISSN 1558-173X, Vol. 37, no 9, p. 1162-1168Article in journal (Refereed)
    Abstract [en]

    A wide-band radio-frequency (RF) front-end is designed with a balanced combined low-noise amplifier and a switching mixer (a low-noise converter) in RF Si-bipolar process with an f(T) of 25 GHz. The circuit achieves 20-dB conversion gain, higher than -4.5-dBm RF-to-IF IIP3 (+15.5-dBm OIP3) and less than 3.8-dB double-side-band noise figure in 900-MHz (e.g., GSM) and 1.9-GHz (e.g., WCDMA) frequency bands. The -1-dB compression point is -20 dBm at 13-mA dc current consumption from a single 5-V supply. The local-oscillator leakage to the input is less than -56 dBm in the 900-MHz band and less than -63 dBm in the 1.9-GHz band. The -3-dB bandwidth of the amplifier is larger than 3 GHz and a wide-band matching at the input with - 10 to -41-dB S-11 is achieved in the frequency bands of interest by applying a dual-loop wide-band active feedback. The die area is 0.69 x 0.9 mm(2). The circuit is suitable for area-efficient multiband multistandard low-IF receivers.

  • 2. Adiseno,
    et al.
    Ismail, Mohammed
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Multiband high-linearity front-end receivers for wireless applications2002In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 30, no 1, p. 59-67Article in journal (Refereed)
    Abstract [en]

    In this paper, a modified front-end receiver configuration, which consists of an LNA and mixer suitable for zero-IF or low-IF receivers, is presented. The idea is to achieve a better linearity for receivers by combining circuit and system level solutions. Three circuit topologies, two in bipolar and one in CMOS technology, are presented in this paper with their simulation results. One of the bipolar topologies has been implemented and measurement results are presented. An IIP3 of up to +0.6 dBm of a combined bipolar LNA and mixer is achieved, depending on frequency of interest and with an acceptable noise figure performance at a current consumption of less than 13 mA from 5 V supply voltage in one circuit and 3 V supply voltage in the other one. An IIP3 up to +5 dBm is achieved for the CMOS topology at a lower overall gain and acceptable noise figure (14.4 mA and 3 V). All circuits presented in this paper are wideband circuits, suitable for area-efficient multiband receivers.

  • 3.
    Andrijevic, Goran
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Magnusson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Kämpe, Andreas
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Multistandard receiver for home networking and digital media2004In: 22ND NORCHIP CONFERENCE, PROCEEDINGS, NEW YORK: IEEE , 2004, p. 131-134Conference paper (Refereed)
    Abstract [en]

    We propose a fully integrated multistandard receiver architecture that fulfills coming media and networking needs of homes. The receiver uses a dual-IF architecture to cover receive bands from 170 MHz to 920 MHz and the Industrial, Scientific and Medical (ISM) band at 2.4GHz. Key performance values meet the DVB-T, Zigbee, Bluetooth and 802.11b requirements (Sensitivity -72.5dBm. available SNR=28dB. Noise Figure 6.7dB. Adjacent Channel Protection Ratio-ACPR=-44dB, IIP3 = -11 dBm).

  • 4.
    Andrijevic, Goran
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Magnusson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    A fully integrated low-IF DVB-T receiver architecture2004In: 2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS / [ed] Nurmi, J; Takala, J; Hamalainen, TD, 2004, p. 189-192Conference paper (Refereed)
    Abstract [en]

    We propose a fully integrated DVB-T receiver architecture for low cost CMOS implementation. The receiver uses a dual-IF architecture to cover the receive bands from 170 MHz to 862 MHz and a Low-IF of 4.57 MHz. Key performance values meet the DVB-T requirements with competitive performance (Sensitivity 72.5 dBm, Noise Figure 66 dB, Adjacent Channel Protection Ratio-ACPR=43dB, available SNR=28 dB) and suggest that low cost receivers are realistic in volume for the coming digital broadcasting systems.

  • 5.
    Bagger, Reza
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic Systems.
    RF Power Amplifier IC with Low Memory Effect, Reduced Low Frequency Gain Peak and Isolated Temperature Tracking Circuitry2008In: 2008 IEEE CSIC Symposium: GaAs ICs Celebrate 30 Years in Monterey, Technical Digest 2008, IEEE , 2008, p. 60-63Conference paper (Refereed)
    Abstract [en]

    A highly linear wideband power amplifier IC with low memory effect for W-CDMA applications is presented utilizing Si LDMOS process technology. The IC was optimized to reduce typical low frequency gain peak often observed in LDMOS power devices. Topology of the interstage matching contributes to reduction of the electrical memory effect to specification level of maximum 2 dB imbalance over power between upper and lower Adjacent Channel Power Ratio when using II-tone wideband modulated signal. The on-chip temperature compensation circuitry tracks the active device temperature characteristic without degradation of the linearity or worsens the memory effect. The measured gain of the IC was 28.5 dB and 3-dB bandwidth of 600 MHz around 2100 MHz was achieved. The IC attained -50 dBc ACPR at 5 W output power. At power level of 45 W and IMD3 = -30dBc (two-tone) the IC exhibited power densities in excess of 469 mW/mm, in which matching losses were included. The IC demonstrated state-of-the-art RF power performance in terms of good linearity, low memory effects, well-suppressed low frequency gain peak and temperature tracking without linearity and IMD balance degradation.

  • 6.
    Chen, Jian
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Jonsson, Fredrik
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Zheng, Li-Rong
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS. KTH, School of Information and Communication Technology (ICT), Centres, VinnExcellence Center for Intelligence in Paper and Packaging, iPACK.
    Zhou, Dian
    State Key Laboratory of ASIC & System, Fudan University, Shanghai.
    A Current Shaping Technique to Lower Phase Noise in LC Oscillators2008In: 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008: St. Julian's; 31 August 2008 through 3 September 2008, 2008, p. 392-395Conference paper (Refereed)
  • 7.
    Jonsson, Fredrik
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    A low-leakage open-loop frequency synthesizer allowing small-area on-chip loop filter2009In: IEEE Transactions on Circuits and Systems II: Express Briefs, ISSN 1549-7747, Vol. 56, no 3, p. 195-199Article in journal (Refereed)
    Abstract [en]

    A frequency synthesizer targeting low-power packet-based frequency-shift-keying (FSK) applications using open-loop modulation of the oscillator is presented. Unlike conventional implementations, the proposed synthesizer is open both when transmitting and receiving data. It is, therefore, possible to use a wide loop-filter bandwidth without violating the noise or spurious requirements. A wideband loop-filter can be implemented using small component values, allowing an on-chip loop filter. To handle the frequency drift associated with open-loop implementations, a low-leakage charge pump is proposed. The synthesizer is implemented using a 0.18-mu m CMOS process. The total power consumption is 9 mW, and the circuit area including the voltage-controlled oscillator (VCO) inductors and on-chip loop-filter is 0.32 mm(2). The measured frequency drift indicates a leakage current of below 2 fA.

  • 8.
    Jonsson, Fredrik
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    A quadrature oscillator using simplified phase and amplitude calibration2008In: 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008: Seattle, WA; 18 May 2008 through 21 May 2008, 2008, p. 992-995Conference paper (Refereed)
    Abstract [en]

    A quadrature oscillator using automatic calibration of phase and amplitude is presented. It is shown that phase errors in a quadrature oscillator will create an amplitude difference between the outputs. The proposed calibration scheme use on-chip amplitude detectors connected in a negative feedback loop to detect and compensate these amplitude differences. The calibration scheme can be implemented using small chip area and low current consumption compared to other calibration schemes. A quadrature oscillator using the proposed calibration is simulated using a 0.18 mu m CMOS process to verify the feasibility of the proposed method.

  • 9.
    Jonsson, Fredrik
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Folding of Noise and Interferers in PLL Charge-Pumps2007Article in journal (Other academic)
  • 10.
    Jonsson, Fredrik
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    RF detector for on-chip amplitude measurements2004In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 40, no 20, p. 1239-1241Article in journal (Refereed)
    Abstract [en]

    A novel on-chip amplitude detector that allows for efficient debugging of complex RF circuits is proposed. The simplicity, low power consumption, flat frequency response, minimal loading of the tested circuit and possibility of multiplexing makes this detector suitable for on-chip RF amplitude measurements. Simulations and measurements confirm the detector operation.

  • 11.
    Jonsson, Fredrik
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Techniques to Reduce Folding of Noise and Interferers in PLL Charge-Pump2008In: 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008: St. Julian's; 31 August 2008 through 3 September 2008, 2008Conference paper (Refereed)
    Abstract [en]

    Due to its strongly non-linear operation, charge-pump Phase Locked Loops (PLL) suffer from folding of noise and interferers. Analysis and methods reducing this effect are scarce. We analyze and propose firstly band-limiting the charge pump currents and secondly carefully selecting the minimum phase detector pulse width to eliminate specific interferers. A PLL has also been measured confirming the predicted results. Measured improvements are typically 5 dB and 20 dB for the two methods, respectively.

  • 12.
    Kämpe, Andreas
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    A differentially tuned varactor for high common mode rejection2005Conference paper (Other academic)
  • 13.
    Kämpe, Andreas
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    A DVB-H receiver architecture2005In: Norchip 2005, Proceedings, NEW YORK: IEEE , 2005, p. 265-268Conference paper (Refereed)
    Abstract [en]

    This paper proposes an integrated DVB-H receiver architecture. The main focus has been low power consumption, aiming at handheld battery operated devices. The total power consumption for the RF tuner is estimated to be less than 20 in W with a duty cycle of 10%. The receiver uses a low-IF architecture and cover the receive bands from 470 MHz to 702 MHz, with an IF of 4.57 MHz. The proposed receiver meets the DVB-H requirements. The, sensitivity is -88 dBm, the noise figure 5.7 dB and the Adjacent Channel Protection Ratio (ACPR) is -51 dB.

  • 14.
    Kämpe, Andreas
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    An LC-VCO with one octave tuning range2005In: Proceedings of the 2005 European Conference on Circuit Theory and Design, Cork, 2005, Vol. 3, p. 321-324Conference paper (Refereed)
    Abstract [en]

    This paper presents a fully integrated low power and low phase-noise VCO, having a tuning range over one octave (1.2 GHz to 2.5 GHz). The architecture is fully differential and the differential tuning offers a common-mode rejection of 31 dB. The VCO is implemented in a 0.18µm CMOS process using a 1.8 V supply. The circuit, including the bias, consumes only 11.6 mW at 1.2 GHz oscillation frequency, the phase-noise is -129 d Be/Hz at 1 MHz frequency offset.

  • 15.
    Magnusson, Håkan
    et al.
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Kämpe, Andreas
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Design of High Performance CMOS charge-pump PLL for Frequency Synthesizers2003In: Proc. ECCTD-European Conference on Circuit Theory and Design, Krakow, Poland, 1-4 September 2003, 2003, p. 185-188Conference paper (Refereed)
  • 16.
    Magnusson, Håkan
    et al.
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
    A compact dual-band power amplifier driver for 2.4GHz and 5.2GHz WLAN transmitters2007In: Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium / [ed] Kushner, L, 2007, p. 83-86Conference paper (Refereed)
    Abstract [en]

    This paper presents a dual-band power amplifier (PA) driver with matched output operating in the 2.4 GHz and 5.2 GHz ISM bands. The use of tunable differential inductors both in the RF choke and the matching circuit saves significant die-area compared to traditional configurations of integrated PA drivers. The fabricated circuit size is as small as 0.48 mm 2 for the used 0.18 mu m CMOS process, saving about 0.5 mm(2) silicon area. Measurement results show that the circuit achieves 10.4 dB gain and a maximum output power of 13 dBm at 2.4 GHz while the gain is 5.1 dB and maximum output power is 8.7dBm at 5.2 GHz. The circuit dissipates 13mA from a 1.8V supple.

  • 17.
    Magnusson, Håkan
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    A cross-coupled dual-loop feedback power amplifier driver2005In: Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005, p. 309-312Conference paper (Refereed)
    Abstract [en]

    This paper presents a wide-band power amplifier (PA) driver with matched output. A dual-loop cross-coupled feedback is applied on a simple two stage core amplifier. The use of a dual-loop feedback provides a broad-band 50 Ω output match without the use of any area consuming matching networks. The PA driver exhibits a gain higher than 6.4 dB, more than +1.9dBm 1-dB compression point with S22 less than -22 dB at the output, while dissipating 42 mA from a 1.8V supply. The output IP3 is better than +13.9 dBm at 2.4 GHz.

  • 18.
    Magnusson, Håkan
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    A cross-coupled dual-loop feedback power amplifier drivier2005In: Proceedings of the 2005 European Conference on Circuit Theory and Design, Vol 3 / [ed] ORegan, F; Wegemer, C, 2005, p. 309-312Conference paper (Refereed)
    Abstract [en]

    This paper presents a wide-band power amplifier (PA) driver with matched output. A dual-loop cross-coupled feedback is applied on a simple two stage core amplifier. The use of a dual-loop feedback provides a broad-band 50 Omega output match without the use of any area consuming matching networks. The PA driver exhibits a gain higher than 6.4 dB, more than +1.9dBm 1-dB compression point with S22 less than -22 dB at the output, while dissipating 42 mA from a 1.8V supply. The output IP3 is better than +13.9 dBm at 2.4 GHz.

  • 19.
    Magnusson, Håkan
    et al.
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, School of Information and Communication Technology (ICT), Microelectronics and Information Technology, IMIT.
    Multiband multi-standard transmitter using a compact power amplifier driver2005In: 2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Digest of Papers / [ed] Jerng, A, NEW YORK, NY: IEEE , 2005, p. 491-494Conference paper (Refereed)
    Abstract [en]

    This paper presents a multistandard transmitter solution using a new power amplifier (PA) driver [1] operating in the broadcast, mobile, and the 2&5 GHz ISM bands. The use of dual-loop feedback in the driver provides a matched output without area consuming matching networks. The circuit size is as small as 0.3 mm(2) for the used 0.18 mu m CMOS process, saving about 0.7 mm(2) silicon area. Measurement results show a gain higher than 7.8 dB with a maximum output power of +4 dBm for all bands and using a supply voltage of 1.8V.

  • 20. Wu, Y.
    et al.
    Ding, X. H.
    Ismail, Mohammed
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    RF bandpass filter design based on CMOS active inductors2003In: IEEE transactions on circuits and systems. 2, Analog and digital signal processing (Print), ISSN 1057-7130, E-ISSN 1558-125X, Vol. 50, no 12, p. 942-949Article in journal (Refereed)
    Abstract [en]

    In this paper, a second-order RF bandpass filter based on active inductor has been implemented in a 0.35 mum CMOS process. Issues related to the intrinsic quality factor and dynamic range of the CMOS active inductor are addressed. Tuned at 900 MHz with Q=40, the filter has 28-dB spurious-free-dynamic-range (SFDR) and total current consumption (including buffer stage) is 17 mA with 2.7-V power supply. Experimental results also show the possibility of using them to build higher order RF filter and voltage-controlled oscillator (VCO).

  • 21. Wu, Y.
    et al.
    Ding, X.
    Ismail, M.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    CMOS active inductor and its application in RF bandpass filter2004In: 2004 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2004. Digest of Papers, IEEE , 2004, p. 655-658Conference paper (Refereed)
    Abstract [en]

    In this paper, issues related to frequency and noise performance of a CMOS active inductor are addressed. A 2nd order RF bandpass filter based on the active inductor has been implemented in a 0.35 μm CMOS process. Tuned at 900MHz with Q=40, the filter has 27dB SFDR and total current consumption including buffer stage is 17mA with 3V power supply. Experimental results also show the possibility of using them to build higher order RF filter and VCO.

  • 22. Wu, Y.
    et al.
    Ding, X.
    Ismail, Mohammed
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Inductorless CMOS RF bandpass filter2001In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 37, no 16, p. 1027-1029Article in journal (Refereed)
    Abstract [en]

    The design and experimental results of a novel CMOS RF filter are presented, Employing a pair of current-reused active inductors. a differential second-order bandpass filter working at 900 M Hz with Q = 41 has been implemented in a 0.35 mum CMOS process.

  • 23. Wu, Y.
    et al.
    Ismail, Mohammed
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    A SiGeHBT translinear harmonic mixer2002In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 31, no 1, p. 65-67Article in journal (Refereed)
    Abstract [en]

    A novel even-order harmonic mixer is proposed. Based on the translinear loop of BJT/HBTs, frequency doubling and single-to-differential conversion circuits have been employed in the design of harmonic mixer. The proposed mixer has been verified in a SiGe HBT process by SpectreRF simulations.

  • 24. Wu, Y.
    et al.
    Ismail, Mohammed
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    CMOS VHF/RF CCO based on active inductors2001In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 37, no 8, p. 472-473Article in journal (Refereed)
    Abstract [en]

    A novel CMOS current controlled oscillator (CCO) is proposed, Based on the current-reused active inductors, a differential oscillator has been designed and fabricated. Measurement results show that it has very wide tuning-range and reasonable phase-noise performance.

  • 25. Wu, Y.
    et al.
    Shi, C. L.
    Ding, X. H.
    Ismail, Mohammed
    Olsson, Håkan
    KTH, Superseded Departments, Microelectronics and Information Technology, IMIT.
    Design of CMOS VHF/RF biquadratic filters2002In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 33, no 3, p. 239-248Article in journal (Refereed)
    Abstract [en]

    In this paper, a class of CMOS biquadratic filter suitable to work at VHF/RF frequency range is presented. The proposed circuit has a simple structure which is analyzed and designed according to a universal G(m)-C biquad filter. Simulation and experimental results show that these filters can work in GHz range and have wide tuning range.

1 - 25 of 25
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