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  • 1.
    Abdul Waheed, Malik
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Cheng, Xin
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Imran, Muhammad
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Kjeldsberg, Per Gunnar
    NTNU.
    Generalized Architecture for a Real-time Computation of an Image Component Features on a FPGAManuskript (preprint) (Övrigt vetenskapligt)
    Abstract [en]

    This paper describes a generalized architecture for real-time component labeling and computation of image component features. Computing real-time image component features is one of the most important paradigms for modern machine vision systems. Embedded machine vision systems demand robust performance, power efficiency as well as minimum area utilization. The presented architecture can easily be extended with additional modules for parallel computation of arbitrary image component features. Hardware modules for component labeling and feature calculation run in parallel. This modularization makes the architecture suitable for design automation. Our architecture is capable of processing 390 video frames per second of size 640x480 pixels. Dynamic power consumption is 24.20mW at 86 frames per second on a Xilinx Spartran6 FPGA.

  • 2.
    Anwar, Qaiser
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Design of coded reference labels for indoor optical navigation using monocular camera2013Ingår i: 2013 International Conference on Indoor Positioning and Indoor Navigation, IPIN 2013, IEEE Computer Society, 2013, s. Art. no. 6817925-Konferensbidrag (Refereegranskat)
    Abstract [en]

    We present a machine vision based indoor navigation system. The paper describes a pose estimation of machine vision system by recognizing rotationally independent optimized color reference labels combined with a geometrical camera calibration model, which determines a set of camera parameters. A reference label carries one byte of information, which can be uniquely designed for various values. More than four reference labels are used in the image to calculate the localization coordinates of the system. An algorithm in Matlab has been developed so that a machine vision system can recognize N number of labels at any given orientation. In addition, a one channel color technique is applied in segmentation process, due to this technique the number of segmented image components is reduced significantly, limiting the memory storage requirement and processing time. The algorithm for pose estimation is based on direct linear transformation (DLT) method with a set of control reference labels in relation to the camera calibration model. From the experiments we concluded that the pose of the machine vision system can be calculated with relatively high precision, in the calibrated environment of reference labels. © 2013 IEEE.

  • 3.
    Cheng, Xin
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Abdul Waheed, Malik
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Color Symbol Design and Its Classification for Optical NavigationManuskript (preprint) (Övrigt vetenskapligt)
    Abstract [en]

    We explored the color symbol design and its recognition in image as reference structure for optical navigation. A colors pair was first determined as foreground and background from HSI color palette and then a color symbol was designed as reference structure. The advantage of using this selected color symbol is a significant reduction, up to 97%, of segmented image components as compared to the grey scale image used. The reduction of segmented components in image will result in saving the hardware resources e.g. memory and processing power which are very important constraint for embedded platforms. A color symbol pattern was designed, comprising of three concentric circles with selected color pair. Inside the inner most circle is the Area Of Interest (AOI), the contents of AOI depends on the particular application. A hardware centric image analysis algorithm is developed for easy and robust recognition. Image components are identified after preprocessing, segmentation and labeling. The color symbol can be recognized at a classification step. Evaluating a variety of viewing angles and reading distances ranging from 30 to 150 degrees and from 1 to 10 meters gives a classification success rate of 72 percent of the positions.

  • 4.
    Cheng, Xin
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Abdul Waheed, Malik
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Optimized Color Pair Selection for Label Design2011Ingår i: Proceedings Elmar - International Symposium Electronics in Marine, Zadar, Croatia: IEEE conference proceedings, 2011, s. 115-118Konferensbidrag (Refereegranskat)
    Abstract [en]

    We present in this paper a technique for designing reference labels that can be used for optical navigation. We optimize the selection of foreground and background colors used for the printed reference labels. This optimization calibrates for individual color responses among printers and cameras such that the Signal to Noise Ratio (SNR) is maximized. Experiments show that we get slightly smaller SNR for the color labels compared to using a monochrome technique. However, the number of segmented image components is reduced significantly by as much as 78 percent. This reduction of number of image components will in turn reduce the memory storage requirement for the computing embedded system.

  • 5.
    Cheng, Xin
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Malik, Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Hardware centric machine vision for high precision center of gravity calculation2010Ingår i: World Academy of Science, Engineering and Technology: An International Journal of Science, Engineering and Technology, ISSN 2010-376X, E-ISSN 2070-3740, Vol. 40, s. 576-583Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    We present a hardware oriented method for real-time measurements of object's position in video. The targeted application area is light spots used as references for robotic navigation. Different algorithms for dynamic thresholding are explored in combination with component labeling and Center Of Gravity (COG) for highest possible precision versus Signal-to-Noise Ratio (SNR). This method was developed with a low hardware cost in focus having only one convolution operation required for preprocessing of data.

  • 6.
    Cheng, Xin
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Malik, Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Hardware Centric Machine Vision for High Precision Center of Gravity Calculation2010Ingår i: PROCEEDINGS OF WORLD ACADEMY OF SCIENCE, ENGINEERING AND TECHNOLOGY, 2010, s. 736-743Konferensbidrag (Refereegranskat)
    Abstract [en]

    We present a hardware oriented method for real-time measurements of object’s position in video. The targeted application area is light spots used as references for robotic navigation. Different algorithms for dynamic thresholding are explored in combination with component labeling and Center Of Gravity (COG) for highest possible precision versus Signal-to-Noise Ratio (SNR). This method was developed with a low hardware cost in focus having only one convolution operation required for preprocessing of data.

  • 7.
    Imran, Muhammad
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Ahmad, Naeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Khursheed, Khursheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    O’Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Implementation of Wireless Vision Sensor Node With a Lightweight Bi-Level Video Coding2013Ingår i: IEEE Journal on Emerging and Selected Topics in Circuits and Systems, ISSN 2156-3357, Vol. 3, nr 2, s. 198-209, artikel-id 6508941Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Wireless vision sensor networks (WVSNs) consist ofa number of wireless vision sensor nodes (VSNs) which have limitedresources i.e., energy, memory, processing, and wireless bandwidth.The processing and communication energy requirements ofindividual VSN have been a challenge because of limited energyavailability. To meet this challenge, we have proposed and implementeda programmable and energy efficient VSN architecturewhich has lower energy requirements and has a reduced designcomplexity. In the proposed system, vision tasks are partitionedbetween the hardware implemented VSN and a server. The initialdata dominated tasks are implemented on the VSN while thecontrol dominated complex tasks are processed on a server. Thisstrategy will reduce both the processing energy consumption andthe design complexity. The communication energy consumption isreduced by implementing a lightweight bi-level video coding on theVSN. The energy consumption is measured on real hardware fordifferent applications and proposed VSN is compared against publishedsystems. The results show that, depending on the application,the energy consumption can be reduced by a factor of approximately1.5 up to 376 as compared to VSN without the bi-level videocoding. The proposed VSN offers energy efficient, generic architecturewith smaller design complexity on hardware reconfigurableplatform and offers easy adaptation for a number of applicationsas compared to published systems.

  • 8.
    Imran, Muhammad
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Khursheed, Khursheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Ahmad, Naeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    O'Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Complexity Analysis of Vision Functions for implementation of Wireless Smart Cameras using System Taxonomy2012Ingår i: Proceedings of SPIE - The International Society for Optical Engineering, Belgium: SPIE - International Society for Optical Engineering, 2012, s. Art. no. 84370C-Konferensbidrag (Refereegranskat)
    Abstract [en]

    There are a number of challenges caused by the large amount of data and limited resources such as memory, processing capability, energy consumption and bandwidth when implementing vision systems on wireless smart cameras using embedded platforms. It is usual for research in this field to focus on the development of a specific solution for a particular problem. There is a requirement for a tool which has the ability to predict the resource requirements for the development and comparison of vision solutions in wireless smart cameras. To accelerate the development of such tool, we have used a system taxonomy, which shows that the majority of wireless smart cameras have common functions. In this paper, we have investigated the arithmetic complexity and memory requirements of vision functions by using the system taxonomy and proposed an abstract complexity model. To demonstrate the use of this model, we have analysed a number of implemented systems with this model and showed that complexity model together with system taxonomy can be used for comparison and generalization of vision solutions. Moreover, it will assist researchers/designers to predict the resource requirements for different class of vision systems in a reduced time and which will involve little effort. 

  • 9.
    Imran, Muhammad
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Khursheed, Khursheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Ahmad, Naeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    O'Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Waheed, Malik A.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Architecture of Wireless Visual Sensor Node with Region of Interest Coding2012Ingår i: Proceedings - 2012 IEEE 3rd International Conference on Networked Embedded Systems for Every Application, NESEA 2012, IEEE conference proceedings, 2012, s. Art. no. 6474029-Konferensbidrag (Refereegranskat)
    Abstract [en]

    The challenges involved in designing a wirelessVision Sensor Node include the reduction in processing andcommunication energy consumption, in order to maximize itslifetime. This work presents an architecture for a wireless VisionSensor Node, which consumes low processing andcommunication energy. The processing energy consumption isreduced by processing lightweight vision tasks on the VSN andby partitioning the vision tasks between the wireless VisionSensor Node and the server. The communication energyconsumption is reduced with Region Of Interest coding togetherwith a suitable bi-level compression scheme. A number ofdifferent processing strategies are investigated to realize awireless Vision Sensor Node with a low energy consumption. Theinvestigation shows that the wireless Vision Sensor Node, usingRegion Of Interest coding and CCITT group4 compressiontechnique, consumes 43 percent lower processing andcommunication energy as compared to the wireless Vision SensorNode implemented without Region Of Interest coding. Theproposed wireless Vision Sensor Node can achieve a lifetime of5.4 years, with a sample period of 5 minutes by using 4 AAbatteries.

  • 10.
    Imran, Muhammad
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Khursheed, Khursheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Ahmad, Naeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    O'Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Waheed, Malik A.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Complexity Analysis of Vision Functions for Comparison of Wireless Smart Cameras2014Ingår i: International Journal of Distributed Sensor Networks, ISSN 1550-1329, E-ISSN 1550-1477, s. Art. no. 710685-Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    There are a number of challenges caused by the large amount of data and limited resources such as memory, processing capability, energy consumption, and bandwidth, when implementing vision systems on wireless smart cameras using embedded platforms. It is usual for research in this field to focus on the development of a specific solution for a particular problem. There is a requirement for a tool which facilitates the complexity estimation and comparison of wireless smart camera systems in order to develop efficient generic solutions. To develop such a tool, we have presented, in this paper, a complexity model by using a system taxonomy. In this model, we have investigated the arithmetic complexity and memory requirements of vision functions with the help of system taxonomy. To demonstrate the use of the proposed model, a number of actual systems are analyzed in a case study. The complexity model, together with system taxonomy, is used for the complexity estimation of vision functions and for a comparison of vision systems. After comparison, the systems are evaluated for implementation on a single generic architecture. The proposed approach will assist researchers in benchmarking and will assist in proposing efficient generic solutions for the same class of problems with reduced design and development costs.

  • 11.
    Imran, Muhammad
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Khursheed, Khursheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Ahmad, Naeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    O'Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Architecture Exploration Based on Tasks Partitioning Between Hardware, Software and Locality for a Wireless Vision Sensor Node2012Ingår i: International Journal of Distributed Systems and Technologies, ISSN 1947-3532, E-ISSN 1947-3540, Vol. 3, nr 2, s. 58-71Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    Wireless Vision Sensor Networks (WVSNs) is an emerging field which consists of a number of Visual Sensor Nodes (VSNs). Compared to traditional sensor networks, WVSNs operates on two dimensional data, which requires high bandwidth and high energy consumption. In order to minimize the energy consumption, the focus is on finding energy efficient and programmable architectures for the VSN by partitioning the vision tasks among hardware (FPGA), software (Micro-controller) and locality (sensor node or server). The energy consumption, cost and design time of different processing strategies is analyzed for the implementation of VSN. Moreover, the processing energy and communication energy consumption of VSN is investigated in order to maximize the lifetime. Results show that by introducing a reconfigurable platform such as FPGA with small static power consumption and by transmitting the compressed images after pixel based tasks from the VSN results in longer battery lifetime for the VSN.

  • 12.
    Khursheed, Khursheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Imran, Muhammad
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    O'Nils, Mattias
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Exploration of tasks partitioning between hardware software and locality for a wireless camera based vision sensor node2011Ingår i: Proceedings - 6th International Symposium on Parallel Computing in Electrical Engineering, PARELEC 2011, IEEE conference proceedings, 2011, s. 127-132Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this paper we have explored different possibilities for partitioning the tasks between hardware, software and locality for the implementation of the vision sensor node, used in wireless vision sensor network. Wireless vision sensor network is an emerging field which combines image sensor, on board computation and communication links. Compared to the traditional wireless sensor networks which operate on one dimensional data, wireless vision sensor networks operate on two dimensional data which requires higher processing power and communication bandwidth. The research focus within the field of wireless vision sensor networks have been on two different assumptions involving either sending raw data to the central base station without local processing or conducting all processing locally at the sensor node and transmitting only the final results. Our research work focus on determining an optimal point of hardware/software partitioning as well as partitioning between local and central processing, based on minimum energy consumption for vision processing operation. The lifetime of the vision sensor node is predicted by evaluating the energy requirement of the embedded platform with a combination of FPGA and micro controller for the implementation of the vision sensor node. Our results show that sending compressed images after pixel based tasks will result in a longer battery life time with reasonable hardware cost for the vision sensor node. © 2011 IEEE.

  • 13.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Machine vision architecture on FPGA2012Licentiatavhandling, sammanläggning (Övrigt vetenskapligt)
  • 14.
    Malik, Abdul Waheed
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Real-Time Optical Position Sensing on FPGA2014Doktorsavhandling, sammanläggning (Övrigt vetenskapligt)
  • 15.
    Malik, Abdul Waheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion. COMSATS Institute of Information Technology, Abbottabad, Pakistan.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Anwar, Qaiser
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Johansen, Tor Arne
    Norwegian University of Science and Technology, Trondheim, Norway .
    Shahzad, Khurram
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Real Time Decoding of Color Symbol for Optical Positioning System2015Ingår i: International Journal of Advanced Robotic Systems, ISSN 1729-8806, E-ISSN 1729-8814, Vol. 12, nr 5Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This paper presents the design and real-time decoding of a color symbol that can be used as a reference marker for optical navigation. The designed symbol has a circular shape and is printed on paper using two distinct colors. This pair of colors is selected based on the highest achievable signal to noise ratio. The symbol is designed to carry eight bit information. Real time decoding of this symbol is performed using a heterogeneous combination of Field Programmable Gate Array (FPGA) and a microcontroller.  An image sensor having a resolution of 1600 by 1200 pixels is used to capture images of symbols in complex backgrounds. Dynamic image segmentation, component labeling and feature extraction was performed on the FPGA. The region of interest was further computed from the extracted features. Feature data belonging to the symbol was sent from the FPGA to the microcontroller. Image processing tasks are partitioned between the FPGA and microcontroller based on data intensity. Experiments were performed to verify the rotational independence of the symbols. The maximum distance between camera and symbol allowing for correct detection and decoding was analyzed. Experiments were also performed to analyze the number of generated image components and sub-pixel precision versus different light sources and intensities. The proposed hardware architecture can process up to 55 frames per second for accurate detection and decoding of symbols at two Megapixels resolution. The power consumption of the complete system is 342mw.

  • 16.
    Malik, Abdul Waheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Cheng, Xin
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Real-time Component Labelling with Centre of Gravity Calculation on FPGA2011Ingår i: 2011 Proceedings of Sixth International Conference on Systems, 2011Konferensbidrag (Refereegranskat)
    Abstract [en]

    In this paper we present a hardware unit for real time component labelling with Centre of Gravity (COG) calculation. The main targeted application area is light spots used as references for robotic navigation. COG calculation can be done in parallel with a single pass component labelling unit without first having to resolve merged labels. We present hardware architecture suitable for implementation of this COG unit on Field programmable Gate Arrays (FPGA). As result, we get high frame speed, low power and low latency. The device utilization and estimated power dissipation are reported for Xilinx Virtex II pro device simulated at 86 VGA sized frames per second. Maximum speed is 410 frames per second at 126 MHz clock.

  • 17.
    Malik, Abdul Waheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Imran, Muhammad
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Lawal, Najeem
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Hardware Architecture for Real-time  Computation of Image Component Feature Descriptors on a FPGA2014Ingår i: International Journal of Distributed Sensor Networks, ISSN 1550-1329, E-ISSN 1550-1477, s. Art. no. 815378-Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This paper describes a hardwarearchitecture for real-time image component labelingand the computation of image component featuredescriptors. These descriptors are object relatedproperties used to describe each image component.Embedded machine vision systems demand a robustperformance, power efficiency as well as minimumarea utilization, depending on the deployedapplication. In the proposed architecture, the hardwaremodules for component labeling and featurecalculation run in parallel. A CMOS image sensor(MT9V032), operating at a maximum clock frequencyof 27MHz, was used to capture the images. Thearchitecture was synthesized and implemented on aXilinx Spartan-6 FPGA. The developed architecture iscapable of processing 390 video frames per second ofsize 640x480 pixels. Dynamic power consumption is13mW at 86 frames per second.

  • 18.
    Malik, Abdul Waheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Meng, Xiaozhou
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Imran, Muhammad
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Institutionen för informationsteknologi och medier.
    Real-Time machine vision system using FPGA and soft-core processor2012Ingår i: Proceedings of SPIE - The International Society for Optical Engineering, SPIE - International Society for Optical Engineering, 2012, s. Art. no. 84370Z-Konferensbidrag (Refereegranskat)
    Abstract [en]

    This paper presents a machine vision system for real-time computation of distance and angle of a camera from reference points in the environment. Image pre-processing, component labeling and feature extraction modules were modeled at Register Transfer (RT) level and synthesized for implementation on field programmable gate arrays (FPGA). The extracted image component features were sent from the hardware modules to a soft-core processor, MicroBlaze, for computation of distance and angle. A CMOS imaging sensor operating at a clock frequency of 27MHz was used in our experiments to produce a video stream at the rate of 75 frames per second. Image component labeling and feature extraction modules were running in parallel having a total latency of 13ms. The MicroBlaze was interfaced with the component labeling and feature extraction modules through Fast Simplex Link (FSL). The latency for computing distance and angle of camera from the reference points was measured to be 2ms on the MicroBlaze, running at 100 MHz clock frequency. In this paper, we present the performance analysis, device utilization and power consumption for the designed system. The FPGA based machine vision system that we propose has high frame speed, low latency and a power consumption that is much lower compared to commercially available smart camera solutions. © 2012 SPIE.

  • 19.
    Malik, Abdul Waheed
    et al.
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Thörnberg, Benny
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Palaniappan, Prasanna Kumar
    Mittuniversitetet, Fakulteten för naturvetenskap, teknik och medier, Avdelningen för elektronikkonstruktion.
    Comparison of Three Smart Camera Architectures for Real-time Machine Vision System2013Ingår i: International Journal of Advanced Robotic Systems, ISSN 1729-8806, E-ISSN 1729-8814, Vol. 10, s. Art. no. 402-Artikel i tidskrift (Refereegranskat)
    Abstract [en]

    This paper presents a machine vision system for real-time computation of distance and angle of a camera from a set of reference points located on a target board. Three different smart camera architectures were explored to compare performance parameters such as power consumption, frame speed and latency.  Architecture 1 consists of hardware machine vision modules modeled at Register Transfer (RT) level and a soft-core processor on a single FPGA chip. Architecture 2 is commercially available software based smart camera, Matrox Iris GT. Architecture 3 is a two-chip solution composed of hardware machine vision modules on FPGA and an external micro-controller. Results from a performance comparison show that Architecture 2 has higher latency and consumes much more power than Architecture 1 and 3. However, Architecture 2 benefits from an easy programming model. Smart camera system with FPGA and external microcontroller has lower latency and consumes less power as compared to single FPGA chip having hardware modules and soft-core processor.

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