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Low-power optimization techniques for BDD mapped circuits using temporal correlation
Department of Computer Science, University of Bremen.
Luleå tekniska universitet.
Luleå University of Technology, Department of Computer Science, Electrical and Space Engineering, Embedded Internet Systems Lab.
2002 (English)In: Canadian journal of electrical and computer engineering, ISSN 0840-8688, Vol. 27, no 4Article in journal (Refereed) Published
Abstract [en]

Low-power optimization techniques for BDD mapped circuits using temporal correlation Techniques d'optimisation pour les faibles puissances pour des diagrammes de décision binaire utilisant la corrélation temporelle Rolf Drechsler, Mikael Kerttu, Per Lindgren, and Mitchell Thornton £ In modern design flows low-power aspects should be considered as early as possible to minimize power dissipation in the resulting circuit. A new binary decision diagram-based design style that considers switching activity optimization using temporal correlation information is presented. The technique is based on an approximation method for switching activity estimation. In the case of finite state machines, the presented method extracts signal statistics by means of Markov chain analyses. Experimental results on a set of MCNC and ISCAS89 benchmarks show the estimated reduction in power dissipation. Les aspects relatifs aux faibles puissances devraient être pris en compte dès les premières phases du design en vue de minimiser la dissipation de puissance du circuit résultant. Cet article présente une méthode de design basée sur un diagramme de décision binaire qui traite l'optimisation des commutations via l'information de corrélation temporelle. L'approche repose sur une approximation de l'estimation de l'activité decommutation. Dans le cas des machines àétats finis, la méthode extrait les statistiques du signal via une analyse par chaînes de Markov. Des résultats expérimentaux obtenus avec des données de banc d'essai MCNC et ISCAS89 montrent la réduction estimée de la dissipation de puissance

Place, publisher, year, edition, pages
2002. Vol. 27, no 4
National Category
Embedded Systems
Research subject
Embedded System
Identifiers
URN: urn:nbn:se:ltu:diva-16289Local ID: fea28740-0580-11dd-b034-000ea68e967bOAI: oai:DiVA.org:ltu-16289DiVA: diva2:989265
Note
Validerad; 2002; 20080408 (ysko)Available from: 2016-09-29 Created: 2016-09-29 Last updated: 2017-11-24Bibliographically approved

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