Regular Symmetry Patterns
2016 (English)In: Verification, Model Checking, and Abstract Interpretation, Springer Berlin/Heidelberg, 2016, 455-475 p.Conference paper (Refereed)
Symmetry reduction is a well-known approach for alleviating the state explosion problem in model checking. Automatically identifying symmetries in concurrent systems, however, is computationally expensive. We propose a symbolic framework for capturing symmetry patterns in parameterised systems (i.e. an infinite family of finite-state systems): two regular word transducers to represent, respectively, parameterised systems and symmetry patterns. The framework subsumes various types of "symmetry relations" ranging from weaker notions (e.g. simulation preorders) to the strongest notion (i.e. isomorphisms). Our framework enjoys two algorithmic properties: (1) symmetry verification: given a transducer, we can automatically check whether it is a symmetry pattern of a given system, and (2) symmetry synthesis: we can automatically generate a symmetry pattern for a given system in the form of a transducer. Furthermore, our symbolic language allows additional constraints that the symmetry patterns need to satisfy to be easily incorporated in the verification/synthesis. We show how these properties can help identify symmetry patterns in examples like dining philosopher protocols, self-stabilising protocols, and prioritised resource-allocator protocol. In some cases (e.g. Gries's coffee can problem), our technique automatically synthesises a safety-preserving finite approximant, which can then be verified for safety solely using a finite-state model checker.
Place, publisher, year, edition, pages
Springer Berlin/Heidelberg, 2016. 455-475 p.
, Lecture Notes in Computer Science, ISSN 0302-9743 ; 9583
IdentifiersURN: urn:nbn:se:uu:diva-287501DOI: 10.1007/978-3-662-49122-5_22ISI: 000375148800022ISBN: 9783662491218OAI: oai:DiVA.org:uu-287501DiVA: diva2:922858
VMCAI 2016, January 17–19, Saint Petersburg, FL
FunderSwedish Research Council, 2014-5484