Laboratory Test Set-up for the Assessment of PMU Time Synchronization Requirements
2015 (English)Conference paper (Refereed)
This paper presents the construction of a Hardware-in-the-loop laboratory test set-up designed to assess the time synchronization requirements of Phasor Measurement Units (PMUs). The test set-up also allows to investigate the effects of signal phase shifts caused by current and voltage transformers, errors in timing source and the impact of these errors when determining time synchronization compliance of PMUs. The paper also describes the structure of an IRIG-B time-sync real-time implementation, which allowed real-time hardware-in-the-loop simulation by providing a PMU with a high-accuracy timing source.
Place, publisher, year, edition, pages
IEEE conference proceedings, 2015.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-175858DOI: 10.1109/PTC.2015.7232731ISI: 000380546800498ScopusID: 2-s2.0-84951299222ISBN: 978-147997693-5OAI: oai:DiVA.org:kth-175858DiVA: diva2:862717
IEEE PowerTech Conference Eindhoven
QC 201510022015-10-232015-10-232016-10-05Bibliographically approved