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Evaluation of a Competitive-Update Cache Coherence Protocol with Migratory Data Detection
Blekinge Institute of Technology, Department of Software Engineering and Computer Science.
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1996 (English)In: Journal of Parallel and Distributed Computing, ISSN 0743-7315, E-ISSN 1096-0848, Vol. 39, no 2, 168-180 p.Article in journal (Refereed) Published
Abstract [en]

Although directory-based write-invalidate cache coherence protocols have a potential to improve the performance of large-scale multiprocessors, coherence misses limit the processor utilization. Therefore, so-called competitive-update protocols-hybrid protocols that on a per-block basis dynamically switch between write-invalidate and write-update-have been considered as a means to reduce the coherence miss rate and have been shown to be a better coherence policy for a wide range of applications. Unfortunately, such protocols may cause high traffic peaks for applications with extensive use of migratory objects. These traffic peaks can offset the performance gain of a reduced miss rate if the network bandwidth is not sufficient. We propose in this study to extend a competitive-update protocol with a previously published adaptive mechanism that can dynamically detect migratory objects and reduce the coherence traffic they cause. Detailed architectural simulations based on five scientific and engineering applications show that this adaptive protocol outperforms a write-invalidate protocol by reducing the miss rate and bandwidth needed by up to 71 and 26%, respectively.

Place, publisher, year, edition, pages
San Diego: Academic , 1996. Vol. 39, no 2, 168-180 p.
Keyword [en]
Cache coherence protocols, Memory consistency models, Performance evaluation, Shared-memory multiprocessors
National Category
Computer Science
URN: urn:nbn:se:bth-9493ISI: A1996WD49200007Local ID: diva2:837357
Available from: 2012-09-18 Created: 2000-03-15 Last updated: 2016-09-06Bibliographically approved

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Grahn, Håkan
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