Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Increasing Verilog’s Generative Power
Ain Shams University, Cairo, Egypt.
Halmstad University, School of Information Technology, Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES). Rice University, Houston, Texas, USA. (Effective Modeling Group)
2014 (English)Conference paper, Published paper (Refereed)
Abstract [en]

To cope with more complex circuits, well-understood higher-level abstraction mechanisms are needed. Verilog is already equipped with promising generative constructs making it possible to concisely describe a family of circuits as a parameterized module; however these constructs suffer from limited expressivity even in the latest IEEE standard. In this paper, we address generative constructs expressivity limitations, identifying the key extensions needed to overcome these limitations, and showing how to incorporate them in Verilog in a disciplined, backward-compatible way.

Place, publisher, year, edition, pages
2014.
National Category
Computer Science
Identifiers
URN: urn:nbn:se:hh:diva-27145OAI: oai:DiVA.org:hh-27145DiVA: diva2:767018
Conference
DUHDe – 1st Workshop on Design Automation for Understanding Hardware Designs – Workshop at DATE 2014, Dresden, Germany, March 28, 2014
Note

This work was supported by the National Science Foundation (NSF) CPS award 1136099 and the Semiconductor Research Consortium (SRC) Task ID: 1403.001 (Intel custom project).

Available from: 2014-11-28 Created: 2014-11-28 Last updated: 2015-12-21Bibliographically approved

Open Access in DiVA

fulltext(351 kB)72 downloads
File information
File name FULLTEXT01.pdfFile size 351 kBChecksum SHA-512
088c6d9f71db92be7e21997ff04f789686b0a822128e4d7f21035055661e5f15df42ce2de1095558aa07ec3d63235be733e86691380299969b9a41016d0d7888
Type fulltextMimetype application/pdf

Search in DiVA

By author/editor
Taha, Walid
By organisation
Centre for Research on Embedded Systems (CERES)
Computer Science

Search outside of DiVA

GoogleGoogle Scholar
Total: 72 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 87 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf