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Full-Custom Sub-/Near-Threshold Cell Library in 130nm CMOS with Application to an ALU
Norwegian University of Science and Technology, Faculty of Information Technology, Mathematics and Electrical Engineering, Department of Electronics and Telecommunications.
2014 (English)MasteroppgaveStudent thesis
Abstract [en]

This thesis presents a cell library with limited functionality targeting to operate in sub-threshold (350mV) as well as above-threshold (1.2V) voltages utilizing the dynamic speed requirement of the circuit. The sub-threshold cell library can be used to synthesize any general Finite State Machine (FSM) since it contains logic gates and a D-FF memory element. The sub-threshold cell library proposed in this thesis consists of: Inverter, NAND2, NOR2, XNOR2, XOR2, AOI22, OAI22 and D flip-flop. All cells are designed with static CMOS and use of 130 nm HVT n-well process. The main motivation behind this work is the desirable for longer lasting battery powered IC chips. CMOS power consumption includes three components where the dynamic component is proportional to VDD^2. Hence, a promising method to reduce power consumption is to reduce the supply voltage to the sub-threshold region. The reduction of VDD increases the delay through the circuit (excellent trade-off in application with low performance requirements) and increases sensitivity to process, voltage and temperature (PVT) variations. The sub-threshold cells are evaluated with an ALU synthesized into three circuits: No.1: unlimited, with use of provided above-threshold cells; No.2: limited to INV, NAND2, NOR2 and D-FF with sub- and above-threshold cell library; and No.3: limited as No.2 + XNOR2, XOR2, AOI22 and OAI22 with sub- and above-threshold cell library. The results shows a power consumption reduction of ~14 times from VDD=1.2V to 350mV for both No.2 and No.3 ALU circuit. It is also shown that a more complex library including XNOR2, XOR2, AOI22 and OAI22 reduces the power consumption with ~7.7% compared to a library with only Inverter, NAND2, NOR2 and D-FF at 350mV. The No.3 circuit is shown to be the best ALU with use of sub-threshold cells in term of delay and power consumption. Both No.2 and No.3 only fails to comply with the 32KHz frequency in SS and FS corner within -40°C and 350mV with use of sub-threshold cells, whereas with above-threshold cells fails in all except FF corner in -40°C, in addition to failing in SS corner at 25°C.

Place, publisher, year, edition, pages
Institutt for elektronikk og telekommunikasjon , 2014. , 152 p.
URN: urn:nbn:no:ntnu:diva-26943Local ID: ntnudaim:11182OAI: diva2:753751
Available from: 2014-10-08 Created: 2014-10-08 Last updated: 2014-10-08Bibliographically approved

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