Ultra-low Power Stack-based Processor for Energy Harvesting Systems
The fast evolution of the Internet of Things suggests an unavoidable transition to this infrastructure in the near future, and to achieve this multiple nodes need to interconnect and communicate efficiently. All nodes will need a power source to operate. Most of them will have very low power consumption requirements. Therefore, a possible solution would be to have an energy harvesting system for the nodes.
The energy harvesting systems will need a CPU to control all operations and to manage the power consumption. The goal of this assignment is to create a base processor capable of controlling the system using ultra-low levels of power.
The proposed approach for the assignment is to use a stack processor. Using the J1 processor as a reference, a new architecture was designed. The design process was done following the design flow tools used by Atmel and covered the simulation, testing, synthesis and place and route process.
The end result of the assignment was a functional stack processor system with the capability to communicate with I/O modules using a Wishbone bus. A custom assembler was created using Arch C to simplify the testing of the architecture. The design was simulated, synthesized and routed using specific libraries from Atmel.
The assignment completed a working design flow that will allow the realization of a proper power analysis in the next phase of development. The stack processor architecture shows high potential for ultra-low power operations. Further time and power analysis is needed to have a complete comparison with other processors.
Place, publisher, year, edition, pages
Institutt for elektronikk og telekommunikasjon , 2014. , 86 p.
IdentifiersURN: urn:nbn:no:ntnu:diva-26940Local ID: ntnudaim:11892OAI: oai:DiVA.org:ntnu-26940DiVA: diva2:753748
Aunet, Snorre, Professor