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Design of Energy Efficient Low Noise Amplifiers in 40 nm bulk CMOS and 28 nm FD-SOI for Intravascular Ultrasound Imaging
Norwegian University of Science and Technology, Faculty of Information Technology, Mathematics and Electrical Engineering, Department of Electronics and Telecommunications.
2014 (English)MasteroppgaveStudent thesis
Abstract [en]

Intravascular ultrasound imaging has during the last decades become an important tool for diagnosis and treatment of coronary diseases. A transition to three-dimensional imaging would drastically improve image quality of this technique, but this transition also comes with several complexity challenges. One way to meet these challenges is by integrating more functionality into the ultrasound catheter. This large scale integration requires a new generation of ultrasound circuitry with tiny power consumption and area footprint in order to fit everything into a tiny catheter. An important part of this circuitry is the analog front-end, which often limit performance in signal processing systems. The trade off between power consumption, speed and noise performance make front-end design a challenging task. In addition should capacitive micromachined ultrasound transducers be interfaced in an optimal way. This thesis presents design of low noise amplifiers in two nanoscale CMOS technologies, aimed for use in integrated three-dimensional intravascular ultrasound systems at 5 MHz. Nanoscale technologies has tempting properties in the digital domain, but poses some challenges in analog applications. Focus has been put on designing robust and energy efficient amplifiers with small footprints and good enough performance. By using gm/Id as an optimization tool, a minimum power consumption was achieved. This resulted in a power consumption of 20.5 uW, signal-to-noise-ratio of 40.7 dB and noise figure of 10.5 dB for a 40 nm bulk CMOS technology. A 28 nm FD-SOI technology achieved a power consumption of 16.0 uW, signal-to-noise-ratio of 39.1 dB and noise figure of 9.26 dB. These amplifiers were fitted into layout areas of 88 and 150 (um)^2 respectively, and parasitic extraction was performed to verify performance. A key in this solution was to use a common-gate-common-source amplifier with feedback biasing. Feedback biasing was made possible through use of compact high resistance subthreshold diodes and area efficient moscap capacitors. This resulted in amplifiers with both small variability and small footprint. Variable gain was implemented in order to enable time-gain-compensation that handles the large dynamic range from ultrasound echoes. Single-ended to differential conversion in the amplifier enabled use of a differential analog-to-digital converter behind the amplifier, which is also an important part of the front-end.

Place, publisher, year, edition, pages
Institutt for elektronikk og telekommunikasjon , 2014. , 102 p.
URN: urn:nbn:no:ntnu:diva-26183Local ID: ntnudaim:11840OAI: diva2:745189
Available from: 2014-09-09 Created: 2014-09-09 Last updated: 2014-09-09Bibliographically approved

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