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Energy Efficient SRAM FPGA based Wireless Vision Sensor Node: SENTIOF‐CAM
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.ORCID iD: 0000-0003-1923-3843
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.ORCID iD: 0000-0002-3493-7016
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design.
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2014 (English)In: IEEE transactions on circuits and systems for video technology (Print), ISSN 1051-8215, Vol. 24, no 12, 2132-2143 p.Article in journal (Refereed) Published
Abstract [en]

Many Wireless Vision Sensor Networks (WVSNs) applications are characterized to have a low duty cycling. An individual wireless Vision Senor Node (VSN) in WVSN is required to operate with limited resources i.e., processing, memory and wireless bandwidth on available limited energy. For such resource constrained VSN, this paper presents a low complexity, energy efficient and programmable VSN architecture based on a design matrix which includes partitioning of processing load between the node and a server, a low complexity background subtraction, bi-level video coding and duty cycling. The tasks partitioning and proposed background subtraction reduces the processing energy and design complexity for hardware implemented VSN. The bi-level video coding reduces the communication energy whereas the duty cycling conserves energy for lifetime maximization. The proposed VSN, referred to as SENTIOF-CAM, has been implemented on a customized single board, which includes SRAM FPGA, microcontroller, radio transceiver and a FLASH memory. The energy values are measured for different states and results are compared with existing solutions. The comparison shows that the proposed solution can offer up to 69 times energy reduction. The lifetime based on measured energy values shows that for a sample period of 5 minutes, a 3.2 years lifetime can be achieved with a battery of 37.44 kJ energy. In addition to this, the proposed solution offers generic architecture with smaller design complexity on a hardware reconfigurable platform and offers easy adaptation for a number of applications.

Place, publisher, year, edition, pages
2014. Vol. 24, no 12, 2132-2143 p.
Keyword [en]
Architecture, image coding, SRAM field-programmable gate array (FPGA), wireless vision sensor networks (WVSNs), wireless vision sensor node (VSN
National Category
Engineering and Technology
URN: urn:nbn:se:miun:diva-21103DOI: 10.1109/TCSVT.2014.2330660ISI: 000346150200010ScopusID: 2-s2.0-84916934186OAI: diva2:689621
Available from: 2014-01-21 Created: 2014-01-21 Last updated: 2015-01-08Bibliographically approved
In thesis
1. Energy Efficient Wireless Sensor Node Architecture for Data and Computation Intensive Applications
Open this publication in new window or tab >>Energy Efficient Wireless Sensor Node Architecture for Data and Computation Intensive Applications
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Wireless Sensor Networks (WSNs), in addition to enabling monitoring solutions for numerous new applications areas, have gained huge popularity as a cost-effective, dynamically scalable, easy to deploy and maintainable alternatives to conventional infrastructure-based monitoring solutions.

A WSN consists of spatially distributed autonomous wireless sensor nodes that measure desired physical phenomena and operate in a collaborative manner to relay the acquired information wirelessly to a central location. A wireless sensor node, integrating the required resources to enable infrastructure-less distributed monitoring, is constrained by its size, cost and energy. In order to address these constraints, a typical wireless sensor node is designed based on low-power and low-cost modules that in turn provide limited communication and processing performances. Data and computation intensive wireless monitoring applications, on the other hand, not only demand higher communication bandwidth and computational performance but also require practically feasible operational lifetimes so as to reduce the maintenance cost associated with the replacement of batteries. In relation to the communication and processing requirements of such applications and the constraints associated with a typical wireless sensor node, this thesis explores energy efficient wireless sensor node architecture that enables realization of data and computation intensive applications.

Architectures enabling raw data transmission and in-sensor processing with various technological alternatives are explored. The potential architectural alternatives are evaluated both analytically and quantitatively with regards to different design parameters, in particular, the performance and the energy consumption. For quantitative evaluation purposes, the experiments are conducted on vibration and image-based industrial condition monitoring applications that are not only data and computation intensive but also are of practical importance.

Regarding the choice of an appropriate wireless technology in an architecture enabling raw data transmission, standard based communication technologies including infrared, mobile broadband, WiMax, LAN, Bluetooth, and ZigBee are investigated. With regards to in-sensor processing, different architectures comprising of sequential processors and FPGAs are realized to evaluate different design parameters, especially the performance and energy efficiency. Afterwards, the architectures enabling raw data transmission only and those involving in-sensor processing are evaluated so as to find an energy efficient solution. The results of this investigation show that in-sensor processing architecture, comprising of an FPGA for computation purposes, is more energy efficient when compared with other alternatives in relation to the data and computation intensive applications.

Based on the results obtained and the experiences learned in the architectural evaluation study, an FPGA-based high-performance wireless sensor platform, the SENTIOF, is designed and developed. In addition to performance, the SETNIOF is designed to enable dynamic optimization of energy consumption. This includes enabling integrated modules to be completely switched-off and providing a fast configuration support to the FPGA.

 In order to validate the results of the evaluation studies, and to assess the performance and energy consumption of real implementations, both the vibration and image-based industrial monitoring applications are realized using the SENTIOF. In terms of computational performance for both of these applications, the real-time processing goals are achieved. For example, in the case of vibration-based monitoring, real-time processing performance for tri-axes (horizontal, vertical and axial) vibration data are achieved for sampling rates of more than 100 kHz.

With regards to energy consumption, based on the measured power consumption that also includes the power consumed during the FPGA’s configuration process, the operational lifetimes are estimated using a single cell battery (similar to an AA battery in terms of shape and size) with a typical capacity of 2600 mA. In the case of vibration-based condition monitoring, an operational lifetime of more than two years can be achieved for duty-cycle interval of 10 minutes or more. The achievable operational lifetime of image-based monitoring is more than 3 years for a duty-cycle interval of 5 minutes or more. 

Place, publisher, year, edition, pages
Sundsvall, Sweden: Mid Sweden University, 2014. 112 p.
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 192
WSN, wireless sensor node, architecture, vibration monitoring, image monitoring, energy efficient, FPGA, power management, embedded system
National Category
Engineering and Technology
urn:nbn:se:miun:diva-21956 (URN)978-91-87557-64-4 (ISBN)
Public defence
2014-06-11, M102, Sundsvall, 10:15 (English)
Available from: 2014-05-26 Created: 2014-05-24 Last updated: 2014-05-26Bibliographically approved

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