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Synthesis and Synchronization Support for Hierarchically Scheduled Real-Time Systems
Mälardalen University, School of Innovation, Design and Engineering. Mälardalen University, School of Innovation, Design and Engineering, Embedded Systems. (IS)ORCID iD: 0000-0001-6157-5199
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

A piece of software, that we define as a software system, can consist of anything from a few lines of program code or the entire software stack in a vehicle. Software systems can be divided into smaller and partially independent parts called subsystems/partitions (we use the words partition and subsystem interchangeably). The non-functional isolation of subsystems, that appears when the software system is hierarchically divided, has great advantages when it comes to preventing fault propagation between subsystems. The hierarchical division, that we refer to as hierarchical scheduling, has other advantages as well. It facilitates re-usability and it makes timing analysis of software systems easier. Hierarchical scheduling has been shown to be a useful tool in counteracting the verification challenges that comes from the growing complexity in software. For example, the avionics-specification ARINC653 and the safety-critical operating systems seL4 and PikeOS safely divide resources for independent safety-critical applications by using hierarchical scheduling.

Hierarchical scheduling can be implemented in many different ways, depending on what resource that is supposed to be shared among applications. The resource could be the CPU, memory, network etc. The work in this thesis is focused on the practical aspects of timing isolation among subsystems, i.e., sharing of the CPU resource. Hence, this work elaborates on how to adapt and extend the operating-system task-scheduler to support hierarchical scheduling. We have focused on both independent and semi-dependent subsystems. Independent subsystems only share general resources such as the CPU and memory. Semi-independent subsystems share not only the general resources, but also other logical resources that can only be accessed in a mutually exclusive way, i.e., by one subsystem at a time. An example of such a resource could be a shared memory-space, e.g., a database, a memory-mapped device etc.

This thesis has two main parts related to hierarchical scheduling: scheduler synthesis, and synchronization.

Scheduler synthesis is related to implementation and design strategies when adding support for hierarchical scheduling in an operating system. We have focused on various operating systems that were lacking the feature of hierarchical scheduling. The two most interesting operating systems that we worked on was Linux and seL4. These two operating systems represent two extremes, where Linux is more focused towards soft real-time systems and seL4 towards pure hard real-time (safety-critical) systems. Linux-based systems have in general less strict demands on correctness and more requirements on usability. Usability implies less installation efforts and less limitations in the usage of the available Linux functionality. The usability aspect is especially important for Linux systems since kernel updates occur much more frequently compared to any other operating system. Hence, extending/modifying the functionality of Linux must be done in a way that does not require any modifications to the kernel. seL4 on the other hand has strict requirements on safety, i.e., functional and non-functional correctness, but also performance efficiency. Guaranteeing correctness implies a potential loss of performance due to the added overhead that the verified software can bring. The correctness aspect includes strategies on how to verify hierarchical schedulers, but also how to minimize the scheduler overhead and achieve as good run-time performance as possible. Conclusively, there are many challenges when it comes to scheduler synthesis. There are requirements on performance, usability, correctness etc. The contribution in the synthesis part includes a scheduler framework called ExSched (External Scheduler). We have also contributed with a novel approach to verify hierarchical schedulers, and a code generator called TAtoC (Timed Automata to C) which contributes to the effective run-time performance of synthesized timed-automata models.

The second part of this thesis, synchronization, is an important general aspect of hierarchically scheduled systems since the isolation of subsystems makes resource sharing among subsystems more challenging. We have advanced the state-of-the-art in this research area by introducing a new synchronization protocol called RRP (Rollback Resource Policy) that improves on the robustness and run-time performance compared to the existing protocols. We have also conducted a large scale experimental evaluation of all existing protocols that we have implemented in the widely used real-time operating system VxWorks.

Place, publisher, year, edition, pages
Västerås: Mälardalen University , 2014. , 266 p.
Series
Mälardalen University Press Dissertations, ISSN 1651-4238 ; 149
National Category
Computer Engineering
Research subject
Computer Science
Identifiers
URN: urn:nbn:se:mdh:diva-23462ISBN: 978-91-7485-131-1 (print)OAI: oai:DiVA.org:mdh-23462DiVA: diva2:678472
Public defence
2014-01-31, Gamma, Västerås, 10:00 (English)
Opponent
Supervisors
Available from: 2014-01-07 Created: 2013-12-12 Last updated: 2014-01-21Bibliographically approved
List of papers
1. ExSched: An External CPU Scheduler Framework for Real-Time Systems
Open this publication in new window or tab >>ExSched: An External CPU Scheduler Framework for Real-Time Systems
2012 (English)In: 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'12), 2012, 240-249 p.Conference paper, Published paper (Refereed)
National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-17311 (URN)10.1109/RTCSA.2012.9 (DOI)2-s2.0-84869021305 (Scopus ID)978-0-7695-4824-1 (ISBN)978-1-4673-3017-6 (ISBN)
Conference
2012 IEEE 18th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), 19-22 Aug. 2012,Seoul
Available from: 2012-12-20 Created: 2012-12-20 Last updated: 2014-01-07Bibliographically approved
2. Towards a User-Mode Approach to Partitioned Scheduling in the seL4 Microkernel
Open this publication in new window or tab >>Towards a User-Mode Approach to Partitioned Scheduling in the seL4 Microkernel
2012 (English)Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a preliminary study of applying partitioned scheduling in the seL4 microkernel. This microkernel is the first operating system kernel ever to be formally proven for its functional correctness. Even though the kernel is completely verified it still delivers high performance comparable to other L4 kernels. The seL4 kernel implements isolation of components in terms of the memory resource and security. However, there is still a missing part when it comes to isolation and that is time partitioning. Time partitioning can be implemented inside the kernel (privileged mode) or in user space (user mode). The latter is done using regular user-space thread(s) and can easily be modified while the other approach requires re-verification of the kernel whenever modifications to the time-partitioning policy is done. On the other hand, having the time-partitioning mechanism in privileged mode would yield better performance. We have implemented time partitioning (partitioned scheduling) in the seL4 user space and we elaborate on its performance in terms of overhead costs.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-17384 (URN)
Conference
5th Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS 2012), San Juan, Puerto Rico, December 4,2012
Available from: 2012-12-20 Created: 2012-12-20 Last updated: 2014-01-07Bibliographically approved
3. Evaluating the Run-Time Performance of Synthesised Resource-Reservation Schedulers Using TAtoC, UPPAAL and Frama-C
Open this publication in new window or tab >>Evaluating the Run-Time Performance of Synthesised Resource-Reservation Schedulers Using TAtoC, UPPAAL and Frama-C
2013 (English)Report (Other academic)
Publisher
10 p.
National Category
Embedded Systems
Identifiers
urn:nbn:se:mdh:diva-23459 (URN)MDH-MRTC-282/2013-1-SE (ISRN)
Available from: 2013-12-12 Created: 2013-12-12 Last updated: 2014-06-05Bibliographically approved
4. Modelling, Verification and Synthesis of Two-Tier Hierarchical Fixed-Priority Preemptive Scheduling
Open this publication in new window or tab >>Modelling, Verification and Synthesis of Two-Tier Hierarchical Fixed-Priority Preemptive Scheduling
2011 (English)In: Proceedings - 23rd EUROMICRO Conference on Real-Time Systems (ECRTS'11), 2011, 172-181 p.Conference paper, Published paper (Refereed)
Abstract [en]

Hierarchical scheduling has major benefits when it comes to integrating hard real-time applications. One of those benefits is that it gives a clear runtime separation of applications in the time domain. This in turn gives a protection against timing error propagation in between applications. However, these benefits rely on the assumption that the scheduler itself schedules applications correctly according to the scheduling parameters and the chosen scheduling policy. A faulty scheduler can affect all applications in a negative way. Hence, being able to guarantee that the scheduler is correct is of great importance. Therefore, in this paper, we study how properties of hierarchical scheduling can be verified. We model a hierarchically scheduled system using task automata, and we conduct verification with model checking using the Times tool. Further, we generate C-code from the model and we execute the hierarchical scheduler in the Vx Works kernel. The CPU and memory overhead of the modelled scheduler is compared against an equivalent manually coded two-level hierarchical scheduler. We show that the worst-case memory consumption is similar and that there is a considerable difference in CPU overhead.

National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-13734 (URN)10.1109/ECRTS.2011.24 (DOI)000323257300016 ()2-s2.0-80052990420 (Scopus ID)9780769544427 (ISBN)
Conference
23rd Euromicro Conference on Real-Time Systems, ECRTS 2011;Porto;5 July 2011 through 8 July 2011
Available from: 2011-12-15 Created: 2011-12-15 Last updated: 2014-01-07Bibliographically approved
5. Resource sharing using the rollback mechanism in hierarchically scheduled real-time open systems
Open this publication in new window or tab >>Resource sharing using the rollback mechanism in hierarchically scheduled real-time open systems
2013 (English)In: Real-Time Technology and Applications - Proceedings, 2013, 129-140 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper we present a new synchronization protocol called RRP (Rollback Resource Policy) which is compatible with hierarchically scheduled open systems and specialized for resources that can be aborted and rolled back. We conduct an extensive event-based simulation and compare RRP against all equivalent existing protocols in hierarchical fixed priority preemptive scheduling; SIRAP (Subsystem Integration and Resource Allocation Policy), OPEN-HSRPnP (open systems version of Hierarchical Stack Resource Policy no Payback) and OPEN-HSRPwP (open systems version of Hierarchical Stack Resource Policy with Payback). Our simulation study shows that RRP has better average-case response-times than the state-of-the-art protocol in open systems, i.e., SIRAP, and that it performs better than OPEN-HSRPnP/OPEN-HSRPwP in terms of schedulability of randomly generated systems. The simulations consider both resources that are compatible with rollback as well as resources incompatible with rollback (only abort), such that the resource-rollback overhead can be evaluated. We also measure CPU overhead costs (in VxWorks) related to the rollback mechanism of tasks and resources. We use the eXtremeDB (embedded real-time) database to measure the resource-rollback overhead.

Series
Real-Time Technology and Applications - Proceedings
National Category
Engineering and Technology
Identifiers
urn:nbn:se:mdh:diva-20920 (URN)10.1109/RTAS.2013.6531086 (DOI)2-s2.0-84881110752 (Scopus ID)
Conference
013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium, RTAS 2013; Philadelphia, PA; United States; 9 April 2013 through 11 April 2013
Available from: 2013-09-05 Created: 2013-08-16 Last updated: 2014-01-07Bibliographically approved
6. An Experimental Evaluation of Synchronization Protocol Mechanisms in the Domain of Hierarchical Fixed-Priority Scheduling
Open this publication in new window or tab >>An Experimental Evaluation of Synchronization Protocol Mechanisms in the Domain of Hierarchical Fixed-Priority Scheduling
2013 (English)In: ACM International Conference Proceeding Series, 2013, 2013, 77-85 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents an extensive implementation study where we evaluate and compare different synchronization protocol mechanisms within the domain of two-level hierarchical fixed-priority preemptive scheduling. These protocol mechanisms include HSRPnP (Hierarchical Stack Resource Policy no Payback), HSRPwP (Hierarchical Stack Resource Policy with Payback), SIRAP (Subsystem Integration and Resource Allocation Policy), RRP (Rollback Resource Policy) and SRPwD (Stack Resource Policy with Donation). In an attempt to shed new light to the research in this area, we focus on the actual software implementation of these protocols in a widely used real-time operating system (VxWorks). This study is not based on worst-case schedulability analysis which is the most common angle of work in this research field. All five protocols have been implemented, tested and executed for several months with many different parameters, for example; variant number of subsystems, number of resources, system utilization settings, resource allocation strategies etc. These tests generated a large amount of useful data, for example, protocol overhead, effective subsystem utilization, number of protocol mechanism invocations etc. Due to the large complexity and size of this data, we analyzed the data with state-of-the-art statistical methods and tools (Principal Component Analysis) in order to grasp the efficiency of the protocols with respect to a large number of different parameters.

National Category
Embedded Systems
Identifiers
urn:nbn:se:mdh:diva-23458 (URN)10.1145/2516821.2516823 (DOI)2-s2.0-84893499282 (Scopus ID)978-1-4503-2058-0 (ISBN)
Conference
21st International Conference on Real-Time Networks and Systems, RTNS 2013; Sophia Antipolis; France; 16 October 2013 through 18 October 2013
Available from: 2013-12-12 Created: 2013-12-12 Last updated: 2014-02-21Bibliographically approved

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