High Speed IO using Xilinx Aurora
Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
A VHDL evaluation platform and interface to the Xilinx Aurora 8b/10b IP has been designed, tested and evaluated. The evaluation platform takes an arbitrary amount of data sources and sends the data over 1,2,4 or 8 multi gigabit serial lanes, using the Aurora 8b/10b protocol. A lightweight communications protocol for point-to-point data transfer, error detection and recovery is used to maintain a reliable and efficient transmission scheme. Priority between sources sharing the serial link is also a part of the platform. The Aurora 8b/10b IP is a lightweight protocol and transceiver interface for Xilinx FPGAs, based on the 8b/10b line encoding protocol. In addition, a demonstration PCB has been developed to introduce the Kintex-7 FPGA to future products at SAAB Dynamics.
Place, publisher, year, edition, pages
2013. , 76 p.
FPGA, Xilinx Aurora, HSIO, High Speed, Serial communication
Computer Engineering Computer Systems Communication Systems Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:liu:diva-102424ISRN: LiTH-ISY-EX--13/4727--SEOAI: oai:DiVA.org:liu-102424DiVA: diva2:677528
SAAB Dynamics AB
Subject / course
Ehliar, Andreas, Biträdande universitetslektor
Seger, Olle, Universitetslektor