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High Speed IO using Xilinx Aurora
Linköping University, Department of Electrical Engineering. Linköping University, The Institute of Technology.
2013 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

A VHDL evaluation platform and interface to the Xilinx Aurora 8b/10b IP has been designed, tested and evaluated. The evaluation platform takes an arbitrary amount of data sources and sends the data over 1,2,4 or 8 multi gigabit serial lanes, using the Aurora 8b/10b protocol. A lightweight communications protocol for point-to-point data transfer, error detection and recovery is used to maintain a reliable and efficient transmission scheme. Priority between sources sharing the serial link is also a part of the platform. The Aurora 8b/10b IP is a lightweight protocol and transceiver interface for Xilinx FPGAs, based on the 8b/10b line encoding protocol. In addition, a demonstration PCB has been developed to introduce the Kintex-7 FPGA to future products at SAAB Dynamics.

Place, publisher, year, edition, pages
2013. , 76 p.
Keyword [en]
FPGA, Xilinx Aurora, HSIO, High Speed, Serial communication
National Category
Computer Engineering Computer Systems Communication Systems Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-102424ISRN: LiTH-ISY-EX--13/4727--SEOAI: oai:DiVA.org:liu-102424DiVA: diva2:677528
External cooperation
SAAB Dynamics AB
Subject / course
Computer Engineering
Supervisors
Examiners
Available from: 2013-12-19 Created: 2013-12-09 Last updated: 2013-12-19Bibliographically approved

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CiteExportLink to record
Permanent link

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Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
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Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
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  • Other locale
More languages
Output format
  • html
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