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A Communication Library for Mapping Dataflow Applications on Manycore Architectures
Halmstad University, School of Information Technology, Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES).
Halmstad University, School of Information Technology, Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES).ORCID iD: 0000-0001-8652-0098
Halmstad University, School of Information Technology, Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES).ORCID iD: 0000-0002-4932-4036
Halmstad University, School of Information Technology, Halmstad Embedded and Intelligent Systems Research (EIS).ORCID iD: 0000-0002-0562-2082
2013 (English)In: Proceedings of the 6th Swedish Multicore Computing Workshop / [ed] Tomas Nordstrom & Zain-ul-Abdin, 2013, 65-68 p.Conference paper, Published paper (Refereed)
Abstract [en]

Dataflow programming is a promising paradigm for high performance embedded parallel computing. When mapping a dataflow program onto a manycore architecture a key component is the library to express the communication between the actors. In this paper we present a dataflow communication library supporting the CAL actor language. A first implementation of the communication library is created for Adapteva’s manycore architecture Epiphany that contains an onchip 2-D mesh network. Three different buffering methods, with and without direct memory access (DMA) transfer, have been implemented and evaluated. We have also made a preliminary study on the effect of mapping strategies of the actors onto the cores. The assessment of the library is based on a CAL implementation of a two dimensional inverse discrete cosine transform (2D-IDCT) and our own CAL-to-C compilation framework. As expected the results show that the most efficient actor to-core mapping strategy is to keep the communication to the nearest neighbor communication pattern as much as possible. Thus, the best way to place a pipelined sequence of computations like our 2D-IDCT is to place the actors into cores in a serpentine fashion. For this application we found that the simple receiver side buffer outperforms the more complicated buffering strategies that used DMA transfer.

Place, publisher, year, edition, pages
2013. 65-68 p.
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:hh:diva-24019OAI: oai:DiVA.org:hh-24019DiVA: diva2:667736
Conference
6th Swedish Multicore Computing Workshop, MCC-2013, November 25-26 2013, Halmstad University, Halmstad, Sweden
Available from: 2013-11-27 Created: 2013-11-27 Last updated: 2017-04-06Bibliographically approved

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Yang, MingkunSavas, SuleymanUl-Abdin, ZainNordström, Tomas
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