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Energy Efficient Reed-Solomon Error Correction
Norwegian University of Science and Technology, Faculty of Information Technology, Mathematics and Electrical Engineering, Department of Electronics and Telecommunications.
2013 (English)MasteroppgaveStudent thesis
Abstract [en]

Energy efficient implementations are very important in order to increase the op- erating time for battery-powered devices. In this thesis a Reed-Solomon encoder and decoder have been implemented. The implementations have been synthesized using a 45nm technology library and power estimations have been performed. To find the most energy efficient implementation, several implementation techniques were evaluated. The implemented system is a 5-bit, RS(31, 27) code. For a Reed- Solomon encoder with low activity, the energy consumption can be reduced by over 40% with the use of clock gating. Several different Reed-Solomon decoder configurations were implemented and synthesized. When comparing the energy consumption of the different configurations, a configuration with two-parallel syn- drome cells and pipelined Chien search, Forney and error correction module were found to be the most energy efficient. This configuration had a 36% lower energy consumption compared to a configuration with the same parallel syndrome cells, and no pipelined modules. It also had a 7% lower energy consumption compared to a configuration with the same pipelined modules and the standard syndrome cells.

Place, publisher, year, edition, pages
Institutt for elektronikk og telekommunikasjon , 2013. , 122 p.
URN: urn:nbn:no:ntnu:diva-22911Local ID: ntnudaim:9561OAI: diva2:655061
Available from: 2013-10-09 Created: 2013-10-09 Last updated: 2013-10-09Bibliographically approved

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