Evaluation of partial reconfiguration in FPGA-based high-performance videosystems
Independent thesis Basic level (professional degree), 20 credits / 30 HE creditsStudent thesis
The use of recongurable logic within the eld of computing has increased during the las tdecades. The ability to change hardware during the design process enables developers to lower the time to market and to reuse designs in several different products. Many different architectures for reconfigurable logic exists today with one of the most commonly used are Field-Programmable Gate Arrays (FPGA). The use of so called dynamic reconfiguration, or partial reconfiguration, in FPGAs have recently been introduced by several leading vendors but the concept has existed for several decades. Partial reconguration is a technique were a specific part of the FPGA can be reprogrammed during run-time. In this report an evaluation of partial reconfiguration is presented with focus on the Xilinx ZynQ System-On-Chip and the GIMME2 vision platform developed at Malardalen University. Special focus has been given to the useof partial reconguration in high-performance video systems such as the GIMME2 platform.The results show that current state of the technology is capable of performing reconfigurations within strict timing constraints but that the associated software tools are yet lacking in both performance and usability
Place, publisher, year, edition, pages
2013. , 70 p.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:mdh:diva-19203OAI: oai:DiVA.org:mdh-19203DiVA: diva2:627637
Subject / course
2013-06-14, Kappa, Västerås, 10:51 (English)
Ekström, Mikael, Dr.
Asplund, Lars, Prof.
Uppdatering av uppsats efter opponenterna har sagt sitt.2013-07-292013-06-122013-07-29Bibliographically approved