On Continuous-Time Incremental Sigma Delta ADCs With Extended Range
2013 (English)In: IEEE Transactions on Instrumentation and Measurement, ISSN 0018-9456, Vol. 62, no 1, 60-70 p.Article in journal (Refereed) Published
In this paper, the use of continuous-time implementation in extended-range (ER) incremental sigma-delta analog-to-digital converters is analyzed in order to explore a possible solution to low-power multichannel applications. The operation principle, possible loop filter topologies, and critical issues are considered using a general approach. It is demonstrated that, in order to fully benefit from ER, careful attention has to be paid to the analog-digital transfer function mismatches. A third-order single-bit topology validates the theoretical analysis. Its performance is evaluated while the impact of key circuit nonidealities is quantified through behavioral-level simulations. It is shown that, by applying analog-digital mismatch compensation in the digital domain, it is possible to relax the amplifiers' finite gain-bandwidth product and finite dc gain requirements, thus allowing a power-conscious alternative.
Place, publisher, year, edition, pages
2013. Vol. 62, no 1, 60-70 p.
analog-to-digital conversion, Continuous-time, incremental sigma-delta, extended range
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject SRA - ICT
IdentifiersURN: urn:nbn:se:kth:diva-109782DOI: 10.1109/TIM.2012.2212597ISI: 000312451500007ScopusID: 2-s2.0-84871022014OAI: oai:DiVA.org:kth-109782DiVA: diva2:584212
FunderSwedish Research CouncilSwedish Foundation for Strategic Research
QC 201301252013-01-252013-01-082013-01-25Bibliographically approved