Change search
ReferencesLink to record
Permanent link

Direct link
Low-Cost MemBIST for Micro-Controllers
Norwegian University of Science and Technology, Faculty of Information Technology, Mathematics and Electrical Engineering, Department of Electronics and Telecommunications.
2012 (English)MasteroppgaveStudent thesis
Abstract [en]

The challenge of testing SRAM memories consists in providing realistic fault models and test solutions with minimal application time. While classical memory tests cover the static faults, they are not sufficient to cover dynamic faults which have emerged in VDSM technologies. The purpose of this thesis is implementation of a memory BIST that targets static faults as well as dynamic faults while maintaining an acceptable test time and area overhead. At first, and as a semester project, the functional fault models (FFMs) associated with state-of-the-art SRAM technologies have been studied and state-of-the-art memory testing algorithms, targeting these FFMs have been presented. Next, and as part of this master's thesis, a combination of March LR and March AB memory testing algorithms is selected and modified to support testing word-oriented memories. Furthermore, this algorithm is extended to provide support for detecting Data-Retention Faults. This algorithm is then implemented using Verilog HDL in Register-Transfer Level of abstraction. The implemented MemBIST is then evaluated with respect to area, performance and fault coverage. A bit-oriented March LR-based MemBIST, currently in use on Atmel® AVR® micro-controllers, is used as a reference for benchmarking purposes. All target fault primitives (FPs) have been implemented using behavioral Verilog HDL and simulated with both MemBISTs. Our evaluations show that our word-oriented MemBIST can provide a 500% performance advantage (due to the word-oriented execution) for 32-bit memories and at the same time has a better fault coverage compared to the reference MemBIST. The implemented algorithm can detect all static and realistic dynamic inter-word memory faults as well as most static and realistic dynamic intra-word faults. The implemented MemBIST also maintains a very small area overhead due to sharing the required registers with existing system components. Keywords: MemBIST, Built-In Self Test, Memory Testing, March Test, Fault Model, Fault Coverage, Fault Detection

Place, publisher, year, edition, pages
Institutt for elektronikk og telekommunikasjon , 2012. , 87 p.
Keyword [no]
ntnudaim:7931, MSECS Embedded Computing Systems
URN: urn:nbn:no:ntnu:diva-18827Local ID: ntnudaim:7931OAI: diva2:566301
Available from: 2012-11-08 Created: 2012-11-08

Open Access in DiVA

fulltext(949 kB)547 downloads
File information
File name FULLTEXT01.pdfFile size 949 kBChecksum SHA-512
Type fulltextMimetype application/pdf
cover(184 kB)24 downloads
File information
File name COVER01.pdfFile size 184 kBChecksum SHA-512
Type coverMimetype application/pdf
attachment(4 kB)20 downloads
File information
File name ATTACHMENT01.zipFile size 4 kBChecksum SHA-512
Type attachmentMimetype application/zip

By organisation
Department of Electronics and Telecommunications

Search outside of DiVA

GoogleGoogle Scholar
Total: 547 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Total: 102 hits
ReferencesLink to record
Permanent link

Direct link