Access Time Analysis for IEEE P1687
2012 (English)In: I.E.E.E. transactions on computers (Print), ISSN 0018-9340, E-ISSN 1557-9956, Vol. 61, no 10, 1459-1472 p.Article in journal (Refereed) Published
The IEEE P1687 (IJTAG) standard proposal aims at providing a standardized interface between the IEEE Standard 1149.1 test access port (TAP) and on-chip embedded test, debug and monitoring logic (instruments), such as scan chains and temperature sensors. A key feature in P1687 is to include Segment Insertion Bits (SIBs) in the scan path to allow flexibility both in designing the instrument access network and in scheduling the access to instruments. This paper presents algorithms to compute the overall access time (OAT) for a given P1687 network. The algorithms are based on analysis for flat and hierarchical network architectures, considering two access schedules, i.e., concurrent schedule and sequential schedule. In the analysis, two types of overhead are identified, i.e., network configuration data overhead and JTAG protocol overhead. The algorithms are implemented and employed in a parametric analysis and in experiments on realistic industrial designs.
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2012. Vol. 61, no 10, 1459-1472 p.
Access time calculation, IEEE P1687 IJTAG, P1687 network architectures, instrument access schedules
Engineering and Technology
IdentifiersURN: urn:nbn:se:liu:diva-82041DOI: 10.1109/TC.2011.155ISI: 000307788900008OAI: oai:DiVA.org:liu-82041DiVA: diva2:558022