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Oscillators with Constant Frequency over PVT
KTH, School of Information and Communication Technology (ICT).
2012 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

This thesis is offered by Texas Instruments, Germany, aimed at designing an on-chip oscillator with constant frequency over process, voltage and temperature variation.

RC relaxation oscillator is chosen to be the solution due to its small area and proper frequency accuracy. Two relaxation oscillators are implemented in the 70nm CMOS technology for comparison. One is the conventional double-grounded-capacitor oscillator, and the other one is the oscillator with voltage averaging feedback (VAF), which is a novel concept for relaxation oscillator design. The conventional oscillator is implemented step by step. The reference generation circuit is simplified with a voltage divider and a voltage-to-current converter; the enhanced output-impedance current mirror is chosen to ensure a high accuracy and high output impedance; the structure of the op amp and the comparators is chosen for low voltage design. Finally, a trimming scheme that is able to compensate a very large process variation with a high resolution is designed. After the schematic design of the whole circuit is done, the layout is finished as well. The simulation result shows that the designed conventional oscillator can achieve a frequency of 10MHz ±1.155% over PVT with a RMS period jitter of 149.7ps.

The oscillator with VAF is superior to the conventional oscillator in that the VAF makes the oscillation frequency independent of the variation of comparator’s delay, which is the dominant contributor of frequency variation in conventional oscillator. Another merit of the oscillator with VAF is that the phase noise at low-offset frequency is suppressed by the VAF. Therefore, the oscillator with VAF can achieve better frequency accuracy and lower jitter than the conventional counterpart. In the actual implementation, the rail-to-rail op amp combining the op amps with both NMOS and PMOS input differential pair is adopted; the smaller resistor and capacitor for the integrator is chosen for a faster startup time; the similar trimming scheme to the conventional oscillator is applied on the capacitor and the reference coefficient. The simulation result confirms that oscillator with VAF has better performance on both frequency accuracy and jitter, which is 10MHz ±0.85% over PVT, with the RMS period jitter of 98.45ps.

Finally, an example of possible application with the constant-frequency oscillator is demonstrated, which is to measure the frequency of a much higher clock signal. The clock frequency can be expressed by the product of the 8-bit counter’s final value and 10MHz. The accuracy of the measurement is dependent on the accuracy of the oscillator over PVT variation.

Place, publisher, year, edition, pages
2012. , 74 p.
Trita-ICT-EX, 2012:193
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-102392OAI: diva2:552603
Educational program
Master of Science - System-on-Chip Design
Available from: 2012-09-14 Created: 2012-09-14 Last updated: 2012-09-14Bibliographically approved

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