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Automatic Verification of Microprocessor designs using Random Simulation
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology.
2012 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

Verification of microprocessor  cores has always been a major challenge and a crucial phase in the development of a microprocessor.  Increasing chip complexities and decreasing time-to-market windows has led to steady increase in the verification costs. Automatic verification of microprocessor  designs based on random simulation helps to quickly capture inconceivable corner cases that would not have been found by manual testing.

This thesis work focuses on the design and implementation of a Co-Simulation testbench platform together with a framework for generating random assembly programs for the functional verification of the OpenRISC Processor, OR1200. A Random Program Generator  based on configurable instruction weights is developed to generate large test volumes. These random test programs are used to verify the functional correctness  of the Register Transfer Logic model of a processor against a behavioral Instruction Set C Simulator. The simulation results show the effectiveness of this approach. Histograms are used to graphically illustrate the instruction and register coverage statistics.

Place, publisher, year, edition, pages
2012.
Series
IT ; 12 035
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:uu:diva-179273OAI: oai:DiVA.org:uu-179273DiVA: diva2:544017
Educational program
Masters Programme in Embedded Systems
Uppsok
Technology
Supervisors
Examiners
Available from: 2012-08-13 Created: 2012-08-13 Last updated: 2012-08-13Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
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  • de-DE
  • en-GB
  • en-US
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Output format
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