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Cool-Cores: Thermal-aware Task Scheduling for OpenMP
KTH, School of Information and Communication Technology (ICT), Communication: Services and Infrastucture, Software and Computer Systems, SCS.
KTH, School of Information and Communication Technology (ICT), Communication: Services and Infrastucture, Software and Computer Systems, SCS.ORCID iD: 0000-0002-9637-2065
2010 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Temperature remains a limiting factor in currentmany-core chips. This work focuses on evaluating different user-mode, task-scheduler’s temperature behaviour. We model a CMPwith 16 cores connected through a mesh interconnect withdirectory based cache coherence. This type of system closelyresembles some of the manycore architecture out on the market.The alghorithms we have investigated are two commonOpenMP scheduling strategies: Breadth-First and Cilk. We alsoimplemented two temperature-aware schedulers based on theBreadth-first and Cilk schedulers. We show that by enablingtemperature-awarness in schedulers, the MTTF can drasticallyimprove with insignificant execution performance losses.

Place, publisher, year, edition, pages
2010.
Keyword [en]
OpenMP, Thermal awareness, task scheduling
National Category
Electrical Engineering, Electronic Engineering, Information Engineering Computer Systems
Identifiers
URN: urn:nbn:se:kth:diva-90370OAI: oai:DiVA.org:kth-90370DiVA: diva2:505112
Conference
THIRD SWEDISH WORKSHOP ON MULTI-CORE COMPUTING - MCC'10
Note
QC 20120223Available from: 2012-02-23 Created: 2012-02-23 Last updated: 2012-02-23Bibliographically approved

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mcc-2010-podobas-brorsson(729 kB)346 downloads
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File name FULLTEXT01.pdfFile size 729 kBChecksum SHA-512
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CiteExportLink to record
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Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
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Language
  • de-DE
  • en-GB
  • en-US
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Output format
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