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An Analysis Framework for Distributed Resource-Aware Scheduling in Multicore Architectures
KTH, School of Information and Communication Technology (ICT).
2011 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

The most signi cant challenge in using platform based designs is to optimally map a set of communicating tasks on the available set of resources, which are present in the form of processing units and communication channels. Additional levels of challenges arise in multicore platforms when considering shared resources that are competed for access by multiple tasks, mapped on possibly different processing units. Thus, subtle changes in the choice of scheduling algorithms, resource access mechanisms and blocking methods have significant effects on the overall behavior of the system. This thesis proposes a simulation based approach, in the form of an analysis framework, to visualize the effects of shared resources on the overall behavior of the system.

The early analysis is done before the cycle accurate system design, and thus disallowing any late changes in the system design flow. Scheduling algorithms, resource access mechanisms and blocking methods are treated as orthogonal concerns, hence allowing much greater exibility to the system architect. The proposed framework allows semaphore-based shared resources as well as nested resource accesses. Moreover, it also allows the addition of new scheduling algorithms, resource access mechanisms, blocking methods and even new orthogonal concerns. The proposed framework is evaluated in terms of expressiveness, usability and extensibility. The main limitation of the proposed framework is the consideration of only the type of shared resources which are located outside any processing unit.

Place, publisher, year, edition, pages
2011. , 142 p.
Trita-ICT-EX, 251
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-90229OAI: diva2:504560
Subject / course
Electronic- and Computer Systems
Educational program
Master of Science - System-on-Chip Design
Available from: 2012-02-21 Created: 2012-02-21 Last updated: 2012-02-21Bibliographically approved

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