A simple statistical cache sharing model for multicores
2011 (English)In: Proc. 4th Swedish Workshop on Multi-Core Computing / [ed] Kessler, Christoph, Linköping, Sweden: Linköping University , 2011, 31-36 p.Conference paper (Other academic)
The introduction of multicores has made analysis of shared resources, such as shared caches and shared DRAM bandwidth, an important topic to study. We present two simple, but accurate, cache sharing models that use high-level data that can easily be measured on existing systems. We evaluate our model using a simulated multicore processor with four cores and a shared L2 cache. Our evaluation shows that we can predict average sharing in groups of four benchmarks with an average error smaller than 0.79% for random caches and 1.34% for LRU caches.
Place, publisher, year, edition, pages
Linköping, Sweden: Linköping University , 2011. 31-36 p.
Research subject Computer Systems
IdentifiersURN: urn:nbn:se:uu:diva-165779OAI: oai:DiVA.org:uu-165779DiVA: diva2:474699
MCC-2011, 4th Swedish Workshop on Multicore Computing, November 23-25, 2011, Linköping, Sweden