Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
A Modular 3D Graphics Accelerator for FPGA
Linköping University, Department of Electrical Engineering, Computer Engineering.
Linköping University, Department of Electrical Engineering, Computer Engineering.
2011 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesisAlternative title
En modulär 3D-grafikaccelerator för FPGA (Swedish)
Abstract [en]

A modular and area-efficient 3D graphics accelerator for tile based rendering in FPGA systems has been designed and implemented. The accelerator supports a subset of OpenGL, with features such as mipmapping, multitexturing and blending. The accelerator consists of a software component for projection and clipping of triangles, as well as a hardware component for rasterization, coloring and video output. Trade-offs made between area, performance and functionality have been described and justified. In order to evaluate the functionality and performance of the accelerator, it has been tested with two different applications.

Abstract [sv]

En modulär och utrymmeseffektiv 3D-grafikaccelerator för tile-baserad rendering i FPGA-system har designats och implementerats. Acceleratorn stöder en delmängd av OpenGL med funktioner som mipmapping, multitexturering och blending. Acceleratorn är uppdelad i en mjukvarudel för projektion och klippning av trianglar och en hårdvarudel för rastrering, färgsättning och utritning till skärm. Avvägningar som gjorts mellan area, prestanda och funktionalitet har beskrivits och motiverats. För att evaulera funktionalitet och prestanda har acceleratorn testats med två olika applikationer.

Place, publisher, year, edition, pages
2011. , 63 p.
Keyword [en]
Tile-based Rendering, 3D Graphics Accelerators, FPGA, Customizable Graphics Accelerator
National Category
Computer Systems Embedded Systems
Identifiers
URN: urn:nbn:se:liu:diva-71049ISRN: LiTH-ISY-EX--11/4479--SEOAI: oai:DiVA.org:liu-71049DiVA: diva2:445413
Subject / course
Computer Engineering
Uppsok
Technology
Supervisors
Examiners
Available from: 2011-10-06 Created: 2011-09-28 Last updated: 2011-10-10Bibliographically approved

Open Access in DiVA

fulltext(2278 kB)605 downloads
File information
File name FULLTEXT01.pdfFile size 2278 kBChecksum SHA-512
2a03ab5f08a7359026ef271096b235c4ae7701067e172ae7eece4e181ab39eae24fa64a7b4285a723647a44ed35e33bab1a0e1c82da94af81a4894f25d13ee46
Type fulltextMimetype application/pdf

By organisation
Computer Engineering
Computer SystemsEmbedded Systems

Search outside of DiVA

GoogleGoogle Scholar
Total: 605 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 586 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf