Specifying Run-time Reconfiguration in Processor Arrays using High-level language
2010 (English)In: WRC 2010: 4th HiPEAC Workshop on Reconfigurable Computing, Pisa, 2010, 1-10 p.Conference paper (Refereed)
The adoption of run-time reconfigurable parallel architectures for high-performance embedded systems is constrained by the lackof a unified programming model which can express both parallelism and reconfigurability. We propose to program an emerging class of reconfigurable processor arrays by using the programming model of occam-pi and describe how the extensions of channel direction specifiers, mobile data, dynamic process invocation, and process placement attributes can be used to express run-time reconfiguration in occam-pi. We present implementations of DCT algorithm to demonstrate the applicability of occam-pi to express reconfigurability. We concluded that occam-pi appears to be a suitable programming model for programming run-time reconfigurable processor arrays.
Place, publisher, year, edition, pages
Pisa, 2010. 1-10 p.
Computer Science Engineering and Technology
Research subject Computer and Systems Science
IdentifiersURN: urn:nbn:se:oru:diva-15262OAI: oai:DiVA.org:oru-15262DiVA: diva2:410641
HiPEAC Workshop on Reconfigurable Computing