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Programming of coarse-grained reconfigurable architectures
Örebro University, School of Science and Technology.
2011 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Coarse-grained reconfigurable architectures, which offer massive parallelism coupled with the capability of undergoing run-time reconfiguration, are gaining attention in order to meet not only the increased computational demands of high-performance embedded systems, but also to fulfill the need of adaptability to functional requirements of the application. This thesis focuses on the programming aspects of such coarse-grained reconfigurable computing devices, including the relevant computation models that are capable of exposing different kinds of parallelism inherent in the application and the ability of these models to capture the adaptability requirements of the application. The thesis suggests the occam-pi language for programming of a broad class of coarse-grained reconfigurable architectures as an intermediate language; we call it intermediate, since we believe that the applicationprogramming is best done in a high-level domain-specific language. The salient properties of the occam-pi language are explicit concurrency with built-in mechanisms for interprocessorcommunication, provision for expressing dynamic parallelism, support for the expression of dynamic reconfigurations, and placement attributes. To evaluate the programming approach, a compiler framework was extended to support the language extensions in the occam-pi language, and backends were developed to target two different coarse-grained reconfigurable architectures. XPP and Ambric. The results on XPP reveal that the occam-pi based implementations produce comparable throughput to those of NML programs, while programming at a much higher level of abstraction than that of NML. Similarly the two occam-pi implementations of autofocus criterion calculation targeted to the Ambric platform outperform the CPU implementation by factors of 11-23. Thus, the results of the implemented case-studies suggest that the occam-pi language based approach simplifies the development of applications employing run-time reconfigurable devices without compromising the performance benefits.

Place, publisher, year, edition, pages
Örebro: Örebro universitet , 2011. , 47 p.
Series
Örebro Studies in Technology, ISSN 1650-8580 ; 48
National Category
Engineering and Technology Computer Science
Research subject
Computer and Systems Science
Identifiers
URN: urn:nbn:se:oru:diva-15246ISBN: 978-91-7668-786-4OAI: oai:DiVA.org:oru-15246DiVA: diva2:410144
Public defence
2011-05-26, Wigforssalen, Högskolan i Halmstad, Halmstad, 10:15 (English)
Opponent
Supervisors
Available from: 2011-04-12 Created: 2011-04-12 Last updated: 2011-06-20Bibliographically approved
List of papers
1. A Study of Design Efficiency with a High-Level Language for FPGAs
Open this publication in new window or tab >>A Study of Design Efficiency with a High-Level Language for FPGAs
2007 (English)In: Proceedings of the 14th International Reconfigurable Architectures Workshop (RAW'07), Piscataway, N.J.: IEEE , 2007, 1-7 p.Conference paper (Refereed)
Abstract [en]

Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used for mapping computations to such architectures still require the knowledge about architectural details of the target device to extract efficiency. A study of the Mobius language and tools is presented in this paper, with a focus on generated hardware performance. A number of streaming and memory-intensive applications have been developed and the results have been compared with the corresponding implementations in VHDL and a behavioral hardware description language. Based upon experimental evidences, it is concluded that Mobius, a minimal parallel processing language targeted for reconfigurable architectures, enhances productivity in terms of design time and code maintainability without considerably compromising performance and resources.

Place, publisher, year, edition, pages
Piscataway, N.J.: IEEE, 2007
Keyword
FPGA, Mobius language, VHDL, behavioral hardware description language, high-level language, minimal parallel processing language, reconfigurable computing device, eprogrammable processing architecture
National Category
Engineering and Technology Computer Science
Research subject
Computer and Systems Science
Identifiers
urn:nbn:se:oru:diva-15259 (URN)10.1109/IPDPS.2007.370394 (DOI)2-s2.0-34548787179 (ScopusID)2082/2363 (Local ID)1-4244-0910-1 (ISBN)2082/2363 (Archive number)2082/2363 (OAI)
Conference
IEEE International Parallel and Distributed Processing Symposium, 2007. IPDPS 2007
Note
©2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.Available from: 2011-04-14 Created: 2011-04-14 Last updated: 2011-04-29Bibliographically approved
2. Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing
Open this publication in new window or tab >>Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing
2009 (English)In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 33, no 3, 161-178 p.Article in journal (Refereed) Published
Abstract [en]

In order to meet the increased computational demands of, e.g., multimedia applications, such as video processing in HDTV, and communication applications, such as baseband processing in telecommunication systems, the architectures of reconfigurable devices have evolved to coarse-grained compositions of functional units or program controlled processors, which are operated in a coordinated manner to improve performance and energy efficiency.

In this survey we explore the field of coarse-grained reconfigurable computing on the basis of the hardware aspects of granularity, reconfigurability, and interconnection networks, and discuss the effects of these on energy related properties and scalability. We also consider the computation models that are being adopted for programming of such machines, models that expose the parallelism inherent in the application in order to achieve better performance. We classify the coarse-grained reconfigurable architectures into four categories and present some of the existing examples of these categories. Finally, we identify the emerging trends of introduction of asynchronous techniques at the architectural level and the use of nano-electronics from technological perspective in the reconfigurable computing discipline.

Place, publisher, year, edition, pages
Amsterdam: Elsvier, 2009
Keyword
Reconfigurable architectures, Coarse-grained arrays, Computation models, Globally-asynchronous locally-synchronous
National Category
Engineering and Technology Computer Science
Research subject
Computer and Systems Science
Identifiers
urn:nbn:se:oru:diva-15260 (URN)10.1016/j.micpro.2008.10.003 (DOI)
Projects
Embedded Parallel Computing
Available from: 2009-09-18 Created: 2011-04-14 Last updated: 2011-06-20Bibliographically approved
3. Using a CSP based programming model for reconfigurable processor arrays
Open this publication in new window or tab >>Using a CSP based programming model for reconfigurable processor arrays
2008 (English)In: Prodeedings of International Conference on Reconfigurable Computing and FPGAs, 2008. ReConFig '08, Los Alamitos, California: IEEE Computer Society , 2008, 343-348 p.Conference paper (Refereed)
Abstract [en]

The growing trend towards adoption of flexible and heterogeneous, parallel computing architectures has increased the challenges faced by the programming community. We propose a method to program an emerging class of reconfigurable processor arrays by using the CSP based programming model of occam-pi. The paper describes the extension of an existing compiler platform to target such architectures. To evaluate the performance of the generated code, we present three implementations of the DCT algorithm. It is concluded that CSP appears to be a suitable computation model for programming a wide variety of reconfigurable architectures.

Place, publisher, year, edition, pages
Los Alamitos, California: IEEE Computer Society, 2008
Keyword
CSP, Programming Models, Coarse-grained Reconfigurable Architectures
National Category
Computer Engineering Engineering and Technology
Research subject
Computer Technology
Identifiers
urn:nbn:se:oru:diva-15261 (URN)10.1109/ReConFig.2008.41 (DOI)2-s2.0-62349104086 (ScopusID)978-0-7695-3474-9 (ISBN)
Conference
2008 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2008, 3-5 December 2008, Cancun, Mexico
Note
©2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.Available from: 2011-04-14 Created: 2011-04-14 Last updated: 2011-04-29Bibliographically approved
4. Specifying Run-time Reconfiguration in Processor Arrays using High-level language
Open this publication in new window or tab >>Specifying Run-time Reconfiguration in Processor Arrays using High-level language
2010 (English)In: WRC 2010: 4th HiPEAC Workshop on Reconfigurable Computing, Pisa, 2010, 1-10 p.Conference paper (Refereed)
Abstract [en]

The adoption of run-time reconfigurable parallel architectures for high-performance embedded systems is constrained by the lackof a unified programming model which can express both parallelism and reconfigurability. We propose to program an emerging class of reconfigurable processor arrays by using the programming model of occam-pi and describe how the extensions of channel direction specifiers, mobile data, dynamic process invocation, and process placement attributes can be used to express run-time reconfiguration in occam-pi. We present implementations of DCT algorithm to demonstrate the applicability of occam-pi to express reconfigurability. We concluded that occam-pi appears to be a suitable programming model for programming run-time reconfigurable processor arrays.

Place, publisher, year, edition, pages
Pisa: , 2010
National Category
Computer Science Engineering and Technology
Research subject
Computer and Systems Science
Identifiers
urn:nbn:se:oru:diva-15262 (URN)
Conference
HiPEAC Workshop on Reconfigurable Computing
Available from: 2011-04-14 Created: 2011-04-14 Last updated: 2011-04-14Bibliographically approved
5. Programming real-time autofocus on a massively parallel reconfigurable architecture using Occam-pi
Open this publication in new window or tab >>Programming real-time autofocus on a massively parallel reconfigurable architecture using Occam-pi
2011 (English)In: Proceedings of the 19th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2011), 2011, 194-201 p.Conference paper (Other academic)
Abstract [en]

Recently we proposed occam-pi as a high-level language for programming massively parallel reconfigurable architectures. The design of occam-pi incorporates ideas from CSP and pi-calculus to facilitate expressing parallelism and reconfigurability. The feasability of this approach was illustratedby building three occam-pi implementations of DCT executing on an Ambric. However, because DCT is a simple and well studied algorithm it remained uncertain whether occam-pi would also be effective for programming novel, more complex algorithms.

In this paper, we demonstrate the applicability of occam-pi for expressing various degrees of parallelism by implementinga significantly large case-study of focus criterion calculation inan autofocus algorithm on the Ambric architecture. Autofocus is a key component of synthetic aperture radar systems. Two implementations of focus criterion calculation were developedand evaluated on the basis of performance. The comparison of the performance results with a single threaded software implementation of the same algorithm show that the throughput of the two implementations are 11x and 23x higher than the sequential implementation despite a much lower (9x) clock frequency. The two designs are, respectively, 29x and 40x moreenergy efficient.

National Category
Engineering and Technology Computer Science
Research subject
Computer and Systems Science
Identifiers
urn:nbn:se:oru:diva-15263 (URN)10.1109/FCCM.2011.20 (DOI)
Conference
19th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2011), Salt Lake City. Utah, May 1-3
Projects
SMECY
Available from: 2011-03-22 Created: 2011-04-14 Last updated: 2011-06-20Bibliographically approved
6. Occam-pi as a high-level language for coarse-grained reconfigurable architectures
Open this publication in new window or tab >>Occam-pi as a high-level language for coarse-grained reconfigurable architectures
2011 (English)In: 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011, 236-243 p.Conference paper (Refereed)
Abstract [en]

Recently we proposed occam-pi as a high-levellanguage for programming coarse grained reconfigurable architectures. The constructs of occam-pi combine ideas from CSPand pi-calculus to facilitate expressing parallelism, communication, and reconfigurability. The feasability of this approachwas illustrated by developing a compiler framework to compile occam-pi implementations to the Ambric architecture.

In this paper, we demonstrate the applicability of occam-pif or programing an array of functional units, eXtreme ProcessingPlatform (XPP). This is made possible by extending the compilerframework to target the XPP architecture, including automatic floating to fixed-point conversion. Different implementations of a FIR filter and a DCT algorithm were developed and evaluated on the basis of performance and resource consumption. The reported results reveal that the approach of using occam-pito program the category of coarse grained reconfigurable architectures appears to be promising. The resulting implementations are generally much superior to those programmed in C and comparable to those hand-coded in the low-level native language NML.

National Category
Computer Engineering Engineering and Technology
Research subject
Computer Technology
Identifiers
urn:nbn:se:oru:diva-15264 (URN)10.1109/IPDPS.2011.147 (DOI)978-1-61284-425-1 (ISBN)
Conference
Reconfigurable Architectures Workshop (RAW'2011) in conjunction with International Parallel and Distributed Processing Symposium (IPDPS'2011), Shanghai, 16-20 May 2011
Available from: 2011-03-22 Created: 2011-04-14 Last updated: 2012-09-06Bibliographically approved

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File name FULLTEXT01.pdfFile size 4831 kBChecksum SHA-512
2b3e376b6d48ee419de37dced82dbccfadf13dfbf4543ca982b2c22f64a4fd6e3bab2986c60d5730ab10c9698a92ed1ceb7acb4b184db3e81c595187b8472884
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e68215be4cb918bc0b22ea49f92af3767ef34c7b96f5185acc28e40168d79ec3158ed0fcf9adf7b9606f0476cfdb322596455164353e8fda4141af199c8af616
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202ba776213415b2ae38274371916166c67b067abdb15de63d3a47bf9c23b16f5548e8e491c36dab3a973fb07ce687e9d088926a10579b84413d233b786ab821
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