Surface engineering in Cu(In,Ga)Se2 solar cells
2013 (English)In: Progress in Photovoltaics, ISSN 1062-7995, E-ISSN 1099-159X, Vol. 21, no 4, 561-568 p.Article in journal (Refereed) Published
Surface modifications of 3-stage co-evaporated Cu(In,Ga)Se2 (CIGS) thin films are investigated by finishing the evaporation with gallium-free (CuInSe2, CIS) stages of various lengths. We find substantial interdiffusion of indium and gallium, smearing out the Ga/(Ga+In) profile so that the addition of a CIS layer merely lowers the gallium content at the surface. For the thinnest top layer, equivalent to 20 nm of pure CIS, we cannot detect any compositional difference compared to the reference device. The modification are evaluated both by electrical characterization of actual solar-cell devices and by electrical modelling, using the latest version of SCAPS-1D. The best solar-cell device from this series is obtained for the 20 nm top layer, with an efficiency of 16.3 % after antireflective coating. However, we observe a trend of decreasing open-circuit voltage for increasing top-layer thicknesses, and we do not find direct evidence that the lowering of the gallium concentration at the CIGS surface should generally be expected to improve the device performance. A simulated device with reduced bulk and interface defect levels achieves 20 % efficiency, but the trends concerning the CIS top layer remain the same.
Place, publisher, year, edition, pages
2013. Vol. 21, no 4, 561-568 p.
CIGS, CIS, interface, SIMS, XPS, electrical modelling
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject Engineering Science with specialization in Electronics
IdentifiersURN: urn:nbn:se:uu:diva-151405DOI: 10.1002/pip.1229ISI: 000319425900016OAI: oai:DiVA.org:uu-151405DiVA: diva2:409790