BERT and FFT measurement systems for high-speed communications and magnetometry
Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
This master thesis presents the development and implementation of two digital systems based on Field-programmable Gate Array (FPGA): a Bit Error Rate Testing (BERT) system for an Optical Communication (OCOM) application, and a Digital Signal Processing (DSP) system for a Spin-Dependent Tunneling Magnetometer (SDTM). Both applications are intended for space and currently under development at the Ångström Space Technology Center (ÅSTC). The DSP system samples analog signals and applies a Fast Fourier Transform (FFT) for to provide frequency spectrum analysis.
The report covers detailed system designs, state machine designs, and accounts for system verifications and measurements. As the live OCOM system and SDTM were unavailable by the time of testing, a series of emulated testing cases was set up to evaluate the digital systems developed. The BERT system was evaluated by checking the bit error rate of a stranded wire connection and a coaxial cable. Analog square and sine wave signals were used to evaluate the performance and accuracy of the FFT in the DSP system. Both systems were functionally verified using the Altera SignalTap II Logic Analyzer.
Analysis of the measurement results for the testing cases indicates that the BERT works well at clock frequencies of 50 and 125 MHz, and that the coaxial cable is more suitable for data transmission as it gives a lower bit error rate than the stranded wire. The DSP system was verified to work well at a clock frequency of 62.5 MHz, and is able to sample any waveform at a sampling frequency of 62.5 MHz and continuously gets, at maximum, 14-bit wide digital signals. The sample point lengths for FFT are 64, 512 and 1024, and the data transfer rate between the FPGA and the computer reaches 115200 baud.
In conclusion, the developed BERT and DSP system can be used to support the OCOM and the SDTM hardware, respectively.
Place, publisher, year, edition, pages
TVE, 11 003
fpga, BERT, DSP, 8b10b
IdentifiersURN: urn:nbn:se:uu:diva-149321OAI: oai:DiVA.org:uu-149321DiVA: diva2:404544
Kratz, HenrikMasszi, Nora