Performance evaluation and optimization of an OMAP platform for embedded SDR systems
Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
During recent years, waveform signal processing within a radio system is performed more and more in the digital domain rather than the analog domain. This is exemplified in Software Defined Radios (SDRs) systems. A SDR is a radio system whose components are realized in software rather than in hardware. Among the main advantages of such systems, the most important are flexibility and portability. A SDR system is flexible since its components can be modified and reconfigured without physically modifying the system. Furthermore, a SDR system can be ported to a number of different environments, hence it is not tied to a specific hardware platform. Due to these characteristics, SDRs are being used more and more in both military and public safety sectors.
A straightforward consequence of the adaptability to variable environments is the porting of SDRs to embedded processors and handheld devices. These devices usually have significant limitations both in terms of computational performance and power constraints. Although the trend in the development of General Purpose Processors (GPPs) and Digital Signal Processors (DSPs) dictated by the Moore’s Law has increased the performance of embedded devices, currently they face limitations due to both the power consumption and to the execution time when executing even partial SDR systems.
The objective of this thesis project is the evaluation and the optimization of the performance of software running on the OMAP3530 platform on a BeagleBoard. This thesis focuses specifically on the system performances as a function of the configuration of the communication link between the GPP and the DSP in order to reduce as much as possible the system delay due to the communication among the processor cores in the system. Furthermore, this thesis compares the performance achieved by the system by exploiting the DSP and the NEON vector coprocessor. The results of this study show reduced communication delays, thus facilitating the porting of a SDR like system to an OMAP platform. The experiments were performed on a BeagleBoard Revision C3, a hardware platform based on the Texas Instruments OMAP3530. The OMAP3530 is a processor made up of two cores: the GPP, a 600-MHz ARM Cortex™-A8 Core and an advanced Very Long Instruction Word (VLIW) microprocessor Core, specifically the TMS320C64x+™ DSP Core. The communication between the two cores is via the DSP/BIOS Link, software designed by Texas Instruments to facilitate the exchanging of data between the two cores. The optimal DSPLink setup was obtained with the MSGQ module. This offered good performance, while reducing the system power consumption and reducing the load on the GPP. Moreover, the DSP-based solution offered better performance than the NEON-based configuration.
Place, publisher, year, edition, pages
2011. , 145 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-31067OAI: oai:DiVA.org:kth-31067DiVA: diva2:402370
Maguire, Gerald, Professor