Low-Cost Through Silicon Vias (Tsvs) With Wire-Bonded Metal Cores And Low Capacitive Substrate-Coupling
2010 (English)In: MEMS 2010: 23RD IEEE INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, TECHNICAL DIGEST, IEEE , 2010, 480-483 p.Conference paper (Refereed)
The three-dimensional (3D) integration of electronics and/or MEMS-based transducers is an emerging technology that vertically interconnects stacked dies using through silicon vias (TSVs). They enable the realization of devices with shorter signal lengths, smaller packages and lower parasitic capacitances, which can result in higher performance and lower costs. This paper presents a novel low-cost fabrication technique for metal-filled TSVs using bonded gold-wires as conductive path. In this concept the wires are surrounded by polymer, which acts both as an electrical insulator causing low capacitive coupling towards the substrate and as a buffer for thermo-mechanical stress.
Place, publisher, year, edition, pages
IEEE , 2010. 480-483 p.
, Proceedings: Ieee Micro Electro Mechanical Systems, ISSN 1084-6999
Bonding, Cable insulation, Costs, Electronics packaging, Fabrication, Parasitic capacitance, Polymers, Silicon, Transducers, Wires
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-24312DOI: 10.1109/MEMSYS.2010.5442460ISI: 000278416400118ScopusID: 2-s2.0-77952772699ISBN: 978-1-4244-5764-9OAI: oai:DiVA.org:kth-24312DiVA: diva2:350040
23rd IEEE International Conference on Micro Electro Mechanical Systems (MEMS 2010) Hong Kong, PEOPLES R CHINA, JAN 24-28, 2010
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