System co-optimization in wireless receiver design with TrACS
2008 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 57, no 1-2, 117-127 p.Article in journal (Refereed) Published
System co-optimization of the analog receiver front end circuit and the digital baseband processing could enable receiver designs with lower power budgets, as the signal processing in the digital receiver is asymmetric across circuit topologies. This paper presents a simulation tool that could assist with such co-optimized designs. TrACS (Transceiver Architecture and Channel Simulator) is an RF/DSP co-simulator, capable of providing an application-specific system-level perspective to receiver design. The simulator is especially relevant in the context of energy-constrained wireless sensor node design, where the simulator's system perspective determines the compatibility of circuit topologies, modulation techniques and synchronization methods for various wireless scenarios. A few case studies are presented, which illustrate co-optimization of a ZigBEE receiver using TrACS.
Place, publisher, year, edition, pages
Springer Science+Business Media, LLC , 2008. Vol. 57, no 1-2, 117-127 p.
wireless sensor node transceiver, system-level simulator, co-optimized, design tools, noisy phase reference, offset-qpsk signals, coherent detection, sensor, networks, performance, challenges
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-17778DOI: 10.1007/s10470-008-9189-2ISI: 000258717300014ScopusID: 2-s2.0-50849107851OAI: oai:DiVA.org:kth-17778DiVA: diva2:335823
QC 201005252011-11-112010-08-052011-11-11Bibliographically approved