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Konstruktion av förstärkare och insamplingssteg till en PSAADC i 0.25 um CMOS
Linköping University, Department of Electrical Engineering.
2002 (Swedish)Independent thesis Basic level (professional degree)Student thesisAlternative title
Design of OP-amplifiers and a voltage reference network for a PSAADC in 0.25 um CMOS (English)
Abstract [en]

The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. The main specifications for the voltage reference generator is to generate stable reference voltages with low noise and a good PSRR. Efforts has also been made to minimize the power consumption.

Place, publisher, year, edition, pages
Institutionen för systemteknik , 2002. , p. 70
Series
LiTH-ISY-Ex ; 3236
Keywords [en]
Electronics, ADC, SAADC, PSAADC, OP, miller-op, OTA, voltage references, tvåstegsförstärkare
Keywords [sv]
Elektronik
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:liu:diva-1132OAI: oai:DiVA.org:liu-1132DiVA, id: diva2:17727
Uppsok
teknik
Available from: 2002-04-02 Created: 2002-04-02

Open Access in DiVA

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ce41b1a6de4b70179077f30d2bdb72e672febcb4f9e63f1482ad94fa37aac14ee6c70a18