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Study of Scalable Architectures on FPGA for Space Data Processors
KTH, School of Electrical Engineering and Computer Science (EECS).
2018 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

Spacecrafts are notably complex systems designed and constructed in multidisciplinary teams. The on-board computer of a spacecraft is part of the on-board data systems in charge of the on-board processing and handling of payload data collected from the instruments, which require high-performance radiationhardened-by-design (RHBD) processing devices. Over the last decades, the demand of high-performance systems used as on-board payload data processing systems has been increasing steadily due to new mission requirements, such as flexibility, faster development time, and new applications. At the same time, this user trend creates a need for higher performance components operating in radiation environments.

The architecture proposed in this thesis is motivated by the results of recent activities supported by the European Space Agency (ESA) in the fields of Network-on-Chips (NoC) and floating-point VLIW Digital Signal Processors (DSPs). This architecture aims to study scaling aspects of VLIW-enable DSP SoC designs using FPGAs. The project shall perform the necessary pre-study activities required for the SoC design, such as synthesis of the IPs on the target FPGA technology.

Lastly, using several DSPs for processing, a LEON3 processor for control, and several components from the GRLIB IP Library, the architecture implemented provides the user an with early version of a platform for further software development on multi-DSP platforms. Also, this architecture consists on a quad-core DSP system, providing a high-performance platform.

Abstract [sv]

Satelliter och rymdfarkoster är komplexa system som utvecklas av tvärvetenskapliga designteam. I ombordsystemen är omborddatorn ansvarig för processering och hantering av vetenskaplig data från nyttolasterna, och kräver strålningstoleranta processorer med hög prestanda. Under de senaste årtiondena har efterfrågan på högpresterande system för omborddatabehandling ökat stadigt på grund av nya uppdragskrav, såsom ökad flexibilitet, snabbare utvecklingstid och nya applikationer. Av samma anledningar har efterfrågan för strålningstoleranta processorkomponenter med ännu högra prestanda ökat med liknande takt.

I den här mastersavhandlingen föreslås en arkitektur som är motiverad av aktiviteter med stöd av ESA (den Europeiska rymdorganisationen) inom nätverk i integrerade kretsar (“Network-On-Chip”, NoC) och signalprocessorer (“DSP”, Digital Signal Processor) med flyttalsstöd. Den föreslagna arkitekturen avses vara lämplig för att användas till att undersöka skalering av komplex kretsdesign av integrerade system (“System-on-Chip”, SoC) med signalprocessorer, m.h.a. FPGA-teknologi.

Slutligen, genom att använda flera dedikerade processorer för signalbehandling, en LEON3-processor för kontroll, och flera komponenter från GRLIB-biblioteket, ges det möjlighet för en potentiell avändare att göra mjukvarutester på ett flerkärnigt inbyggt processorsystem. Arkitekturen har designats med ett fyrkärnigt signalprocesserings system, vilket anses ge en hög prestanda.

Place, publisher, year, edition, pages
2018. , p. 61
Series
TRITA-EECS-EX ; 2018:784
National Category
Computer and Information Sciences
Identifiers
URN: urn:nbn:se:kth:diva-254909OAI: oai:DiVA.org:kth-254909DiVA, id: diva2:1335945
Subject / course
Computer Science
Educational program
Degree of Master
Supervisors
Examiners
Available from: 2019-07-08 Created: 2019-07-08 Last updated: 2019-07-08Bibliographically approved

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