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Miniaturization of CMOS
Mid Sweden University, Faculty of Science, Technology and Media, Department of Electronics Design. Chinese Acad Sci, Beijing, Peoples R China; Univ Chinese Acad Sci, Beijing, Peoples R China.
Chinese Acad Sci, Beijing, Peoples R China.
Chinese Acad Sci, Beijing, Peoples R China; Gen Res Inst Nonferrous Met, Beijing, Peoples R China.
Chinese Acad Sci, Beijing, Peoples R China.
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2019 (English)In: Micromachines, ISSN 2072-666X, E-ISSN 2072-666X, Vol. 10, no 5, article id 293Article in journal (Refereed) Published
Abstract [en]

When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today's 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.

Place, publisher, year, edition, pages
2019. Vol. 10, no 5, article id 293
Keywords [en]
FinFETs, CMOS, device processing, integrated circuits
Identifiers
URN: urn:nbn:se:miun:diva-36653DOI: 10.3390/mi10050293ISI: 000470966700016PubMedID: 31052223OAI: oai:DiVA.org:miun-36653DiVA, id: diva2:1335849
Available from: 2019-07-08 Created: 2019-07-08 Last updated: 2019-07-08Bibliographically approved

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