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Cache memory design trade-offs for current and emerging workloads
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Division of Computer Systems. Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computer Systems. (UART)
2003 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

The memory system is the key to performance in contemporary computer systems. When designing a new memory system, architectural decisions are often arbitrated based on their expected performance effect. It is therefore very important to make performance estimates based on workloads that accurately reflect the future use of the system. This thesis presents the first memory system characterization study of Java-based middleware, which is an emerging workload likely to be an important design consideration for next generation processors and servers.

Manufacturing technology has reached a point where it is now possible to fit multiple full-scale processors and integrate board-level features on a chip. The raised competition for chip resources has increased the need to design more effective caches without trading off area or power. Two common ways to improve cache performance is to increase the size or associativity of the cache. Both of these approaches come at a high cost in chip area as well as power.

This thesis presents two new cache organizations, each aimed at more efficient use of either power or area. First, the Elbow cache is presented, which is shown to be a power-efficient alternative to highly set-associative caches. Secondly, a selective cache allocation algorithm is presented, RASCAL, that significantly reduces the miss ratio at a limited cost in area.

Place, publisher, year, edition, pages
Uppsala University, 2003.
Series
Information technology licentiate theses: Licentiate theses from the Department of Information Technology, ISSN 1404-5117 ; 2003-009
National Category
Computer Engineering
Research subject
Computer Systems
Identifiers
URN: urn:nbn:se:uu:diva-86156OAI: oai:DiVA.org:uu-86156DiVA, id: diva2:116965
Supervisors
Available from: 2003-09-26 Created: 2006-12-27 Last updated: 2018-01-13Bibliographically approved

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CiteExportLink to record
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