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Synchrophasor Applications and their Vulnerability to Time Synchronization Impairment
KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems. (SmarTS-Lab & Power System Dynamics, Operation and Control)ORCID iD: 0000-0002-6749-8785
2017 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

Recent years have seen the significance of utilizing time-synchronized, high resolution measurements from phasor measurement units (PMUs) to develop and implement wide-area monitoring, protection and control (WAMPAC) systems. WAMPAC systems aim to provide holistic view of the power system and enable detection and control of certain power system phenomena to enhance reliability and integrity of the grid.

This thesis focuses on the design, development and experimental validation of WAMPAC applications, and investigates their vulnerability to time synchronization impairment. To this purpose, a state-of-the-art real-time hardware-in-the-loop (RT-HIL) test-bench was established for prototyping of synchrophasor-based applications. This platform was extensively used throughout the thesis for end-to-end testing of the proposed WAMPAC applications. To facilitate the development of WAMPAC applications, an open-source real-time data mediator is presented that parses the incoming synchrophasor stream and provides access to raw data in LabVIEW environment.

Within the domain of wide-area protection applications, the thesis proposes hybrid synchrophasor and IEC 61850-8-1 GOOSE-based islanding detection and automatic synchronization schemes. These applications utilize synchrophasor measurements to assess the state of the power system and initiate protection / corrective action using GOOSE messages. The associated communication latencies incurred due to the utilization of synchrophasors and GOOSE messages are also determined. It is shown that such applications can have a seamless and cost-effective deployment in the field.

  Within the context of wide-area control applications, this thesis explores the possibility of utilizing synchrophasor-based damping signals in a commercial excitation control system (ECS). For this purpose, a hardware prototype of wide-area damping controller (WADC) is presented together with its interface with ECS. The WADC allows real-time monitoring and remote parameter tuning that could potentially facilitate system operators’ to exploit existing damping assets (e.g. conventional generators) when changes in operating conditions or network topology emerges.

Finally the thesis experimentally investigates the impact of time synchronization impairment on WAMPAC applications by designing RT-HIL experiments for time synchronization signal loss and time synchronization spoofing. It is experimentally demonstrated that GPS-based time synchronization impairment results in corrupt phase angle computations by PMUs, and the impact this has on associated WAMPAC application. 

Place, publisher, year, edition, pages
Stockholm, Sweden: KTH Royal Institute of Technology, 2017. , p. 147
Series
TRITA-EE, ISSN 1653-5146 ; 2017:147
Keyword [en]
Hardware-in-the-loop, phasor measurement units, real-time simulation, time synchronization, wide-area monitoring protection and control.
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Electrical Engineering
Identifiers
URN: urn:nbn:se:kth:diva-217978ISBN: 978-91-7729-575-4 (print)OAI: oai:DiVA.org:kth-217978DiVA, id: diva2:1158543
Public defence
2017-12-11, F3, Lindstedtsvägen 26, Stockholm, 10:00 (English)
Opponent
Supervisors
Projects
smart transmission grid operation and control (STRONg2rid)
Note

QC 20171121

Available from: 2017-11-21 Created: 2017-11-20 Last updated: 2017-11-21Bibliographically approved

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