Change search
ReferencesLink to record
Permanent link

Direct link
Advances in Functional Decomposition: Theory and Applications
RISE, Swedish ICT, SICS. Department of Electronic, Computer, and Software Systems.
Number of Authors: 1
2006 (English)Doctoral thesis, monograph (Other academic)
Abstract [en]

Functional decomposition aims at finding efficient representations for Boolean functions. It is used in many applications, including multi-level logic synthesis, formal verification, and testing. This dissertation presents novel heuristic algorithms for functional decomposition. These algorithms take advantage of suitable representations of the Boolean functions in order to be efficient. The first two algorithms compute simple-disjoint and disjoint-support decompositions. They are based on representing the target function by a Reduced Ordered Binary Decision Diagram (BDD). Unlike other BDD-based algorithms, the presented ones can deal with larger target functions and produce more decompositions without requiring expensive manipulations of the representation, particularly BDD reordering. The third algorithm also finds disjoint-support decompositions, but it is based on a technique which integrates circuit graph analysis and BDD-based decomposition. The combination of the two approaches results in an algorithm which is more robust than a purely BDD-based one, and that improves both the quality of the results and the running time. The fourth algorithm uses circuit graph analysis to obtain non-disjoint decompositions. We show that the problem of computing non-disjoint decompositions can be reduced to the problem of computing multiple-vertex dominators. We also prove that multiple-vertex dominators can be found in polynomial time. This result is important because there is no known polynomial time algorithm for computing all non-disjoint decompositions of a Boolean function. The fifth algorithm provides an efficient means to decompose a function at the circuit graph level, by using information derived from a BDD representation. This is done without the expensive circuit re-synthesis normally associated with BDD-based decomposition approaches. Finally we present two publications that resulted from the many detours we have taken along the winding path of our research.

Place, publisher, year, edition, pages
2006, 3. , 176 p.
Keyword [en]
computer science, electronic system design, Boolean decomposition, binary decision diagram, logic synthesis, graph algorithm
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:ri:diva-21180OAI: oai:DiVA.org:ri-21180DiVA: diva2:1041214
Available from: 2016-10-31 Created: 2016-10-31

Open Access in DiVA

fulltext(1084 kB)12 downloads
File information
File name FULLTEXT01.pdfFile size 1084 kBChecksum SHA-512
45c534144af329e5ec9add285cdc77ee1ab70621eb53185b36dabed77d5bc8a427cf4c140141c8f1528cfff63667167f90f76e2491cd4832546a6f112db1f747
Type fulltextMimetype application/pdf

Other links

http
By organisation
SICS
Computer and Information Science

Search outside of DiVA

GoogleGoogle Scholar
Total: 12 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Total: 2 hits
ReferencesLink to record
Permanent link

Direct link