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Towards Self-Learning Sensors: FPGA-Based ADC Front End
2013 (English)Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

With the amount of sensors in the environment ever increasing, high demands are being posed on today's sensor systems in terms of power consumption, data compression and cost. This thesis presents the work of constructing and evaluating an FPGA-based ADC front end suitable for running demanding signal processing algorithms on it with data rate reduction as its primary goal. A prototype of the front end is built and demonstration software is written demonstrating the feasibility of it being able to handle a matching pursuit-based algorithm which allows for sparse representations of signals for data rates over 1 MHz. This assessment is done by evaluating the front end in terms of noise, power consumption and speed and also by the construction of a test application, an FIR filter bank which is related and compared to an FPGA implementation of matching pursuit. It is also concluded that for the system described in this thesis, an ASIC design may be more suitable than an FPGA design because of the higher power consumption, lower speed and higher per-unit-cost of FPGAs in comparison to ASICs.

Place, publisher, year, edition, pages
2013. , 56 p.
Keyword [en]
Keyword [sv]
Teknik, FPGA, Machine-learning, ADC
URN: urn:nbn:se:ltu:diva-58289Local ID: ee14f4ac-c57c-45e8-9d62-7308569eecbaOAI: diva2:1031677
Subject / course
Student thesis, at least 30 credits
Educational program
Engineering Physics and Electrical Engineering, master's level
Validerat; 20130731 (global_studentproject_submitter)Available from: 2016-10-04 Created: 2016-10-04Bibliographically approved

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