A practical type analysis for verification of modular Prolog programs
2008 (English)In: Proceedings of the 2008 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation, ACM Digital Library, 2008, 61-70 p.Conference paper (Refereed)
Regular types are a powerful tool for computing very precise descriptive types for logic programs. However, in the context of reallife, modular Prolog programs, the accurate results obtained by regular types often come at the price of efficiency. In this paper we propose a combination of techniques aimed at improving analysis efficiency in this context. As a first technique we allow optionally reducing the accuracy of inferred types by using only the types defined by the user or present in the libraries. We claim that, for the purpose of verifying type signatures given in the form of assertions the precision obtained using this approach is sufficient, and show that analysis times can be reduced significantly. Our second technique is aimed at dealing with situations where we would like to limit the amount of reanalysis performed, especially for library modules. Borrowing some ideas from polymorphic type systems, we show how to solve the problem by admitting parameters in type specifications. This allows us to compose new call patterns with some precomputed analysis info without losing any information. We argue that together these two techniques contribute to the practical and scalable analysis and verification of types in Prolog programs.
Place, publisher, year, edition, pages
ACM Digital Library, 2008. 61-70 p.
Research subject Embedded System
IdentifiersURN: urn:nbn:se:ltu:diva-31664Local ID: 5e91e090-c117-11dd-a054-000ea68e967bISBN: 978-1-595-93977-7OAI: oai:DiVA.org:ltu-31664DiVA: diva2:1004898
ACM/SIGPLAN Workshop Partial Evaluation and Semantics-Based Program Manipulation : 07/01/2008 - 08/01/2008
Upprättat; 2008; 20081203 (pawpie)2016-09-302016-09-30