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Synthesizing Code for GPGPUs from Abstract Formal Models
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.ORCID-id: 0000-0001-6794-6413
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektroniksystem.ORCID-id: 0000-0003-4859-3100
2014 (engelsk)Inngår i: Forum on specification and Design Languages (FDL), Munich, Germany, October 14-16, 2014 / [ed] Dr. Adam Morawiec and Jinnie Hinderscheit, IEEE conference proceedings, 2014Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Today multiple frameworks exist for elevating thetask of writing programs for GPGPUs, which are massively data-parallel execution platforms. These are needed as writing correctand high-performing applications for GPGPUs is notoriouslydifficult due to the intricacies of the underlying architecture.However, the existing frameworks lack a formal foundation thatmakes them difficult to use together with formal verification,testing, and design space exploration. We present in this papera novel software synthesis tool – called f2cc – which is capableof generating efficient GPGPU code from abstract formal modelsbased on the synchronous model of computation. These modelscan be built using high-level modeling methodologies that hidelow-level architecture details from the developer. The correctnessof the tool has been experimentally validated on models derivedfrom two applications. The experiments also demonstrate that thesynthesized GPGPU code yielded a 28× speedup when executedon a graphics card with 96 cores and compared against asequential version that uses only the CPU.

sted, utgiver, år, opplag, sider
IEEE conference proceedings, 2014.
Emneord [en]
Analytical models, computational modeling, system- level design, multicore processing
HSV kategori
Forskningsprogram
Datalogi
Identifikatorer
URN: urn:nbn:se:kth:diva-154842DOI: 10.1109/FDL.2014.7119363Scopus ID: 2-s2.0-84940498062ISBN: 979-10-9227-04-7 (tryckt)OAI: oai:DiVA.org:kth-154842DiVA, id: diva2:758857
Konferanse
Forum on specification and Design Languages(FDL),October 14-16, 2014 Munich, Germany
Merknad

QC 20141117

Tilgjengelig fra: 2014-10-28 Laget: 2014-10-28 Sist oppdatert: 2015-12-10bibliografisk kontrollert

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hjort-blindell-menne-sander-2014-synthesizing-code-for-gpgpus-from-abstract-formal-models.pdf(284 kB)152 nedlastinger
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Hjort Blindell, GabrielMenne, ChristianSander, Ingo
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