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Runtime Parallelisation Switching for MPEG4 Encoder on MPSoC
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik- och datorsystem, ECS.
2008 (engelsk)Independent thesis Advanced level (degree of Master (Two Years)), 80 poäng / 120 hpOppgave
Abstract [en]

The recent development for multimedia applications on mobile terminals raised the need for flexible and scalable computing platforms that are capable of providing considerable (application specific) computational performance within a low cost and a low energy budget. The MPSoC with multi-disciplinary approach, resolving application mapping, platform architecture and runtime management issues, provides such multiple heterogeneous, flexible processing elements. In MPSoC, the run-time manager takes the design time exploration information as an input and selects an active Pareto point based on quality requirement and available platform resources, where a Pareto point corresponds to a particular parallelization possibility of target application. To use system’s scalability at best and enhance application’s flexibility a step further, the resource management and Pareto point selection decisions need to be adjustable at run-time. This thesis work experiments run-time Pareto point switching for MPEG-4 encoder. The work involves design time exploration and then embedding of two parallelization possibilities of MPEG-4 encoder into one single component and enabling run-time switching between parallelizations, to give run-time control over adjusting performance-cost criteria and allocation de-allocation of hardware resources at run-time. The newer system has the capability to encode each video frame with different parallelization. The obtained results offer a number of operating points on Pareto curve in between the previous ones at sequence encoding level. The run-time manager can improve application performance up to 50% or can save memory bandwidth up to 15%, according to quality request.

sted, utgiver, år, opplag, sider
2008.
Serie
TRITA-ICT-EX ; 2010:5
HSV kategori
Identifikatorer
URN: urn:nbn:se:kth:diva-144038OAI: oai:DiVA.org:kth-144038DiVA, id: diva2:713088
Fag / kurs
Embedded System Design
Utdanningsprogram
Master of Science - System-on-Chip Design
Presentation
2008-10-31, Röda Rummet, 8th Floor, C Elevator Forum, Kista, 10:00 (engelsk)
Veileder
Examiner
Tilgjengelig fra: 2014-04-22 Laget: 2014-04-05 Sist oppdatert: 2022-06-23bibliografisk kontrollert

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