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Real-Time machine vision system using FPGA and soft-core processor
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.
Mid Sweden University, Faculty of Science, Technology and Media, Department of Information Technology and Media.ORCID iD: 0000-0003-1923-3843
2012 (English)In: Proceedings of SPIE - The International Society for Optical Engineering, SPIE - International Society for Optical Engineering, 2012, p. Art. no. 84370Z-Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a machine vision system for real-time computation of distance and angle of a camera from reference points in the environment. Image pre-processing, component labeling and feature extraction modules were modeled at Register Transfer (RT) level and synthesized for implementation on field programmable gate arrays (FPGA). The extracted image component features were sent from the hardware modules to a soft-core processor, MicroBlaze, for computation of distance and angle. A CMOS imaging sensor operating at a clock frequency of 27MHz was used in our experiments to produce a video stream at the rate of 75 frames per second. Image component labeling and feature extraction modules were running in parallel having a total latency of 13ms. The MicroBlaze was interfaced with the component labeling and feature extraction modules through Fast Simplex Link (FSL). The latency for computing distance and angle of camera from the reference points was measured to be 2ms on the MicroBlaze, running at 100 MHz clock frequency. In this paper, we present the performance analysis, device utilization and power consumption for the designed system. The FPGA based machine vision system that we propose has high frame speed, low latency and a power consumption that is much lower compared to commercially available smart camera solutions. © 2012 SPIE.

Place, publisher, year, edition, pages
SPIE - International Society for Optical Engineering, 2012. p. Art. no. 84370Z-
Keywords [en]
Component labeling; Machine vision; Smart camera
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:miun:diva-16697DOI: 10.1117/12.927854ISI: 000305693900028Scopus ID: 2-s2.0-84861951577Local ID: STCISBN: 978-081949129-9 (print)OAI: oai:DiVA.org:miun-16697DiVA, id: diva2:543831
Conference
Real-Time Image and Video Processing 2012;Brussels;19 April 2012through19 April 2012;Code90041
Available from: 2012-08-10 Created: 2012-08-10 Last updated: 2016-10-20Bibliographically approved
In thesis
1. Machine vision architecture on FPGA
Open this publication in new window or tab >>Machine vision architecture on FPGA
2012 (English)Licentiate thesis, comprehensive summary (Other academic)
Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2012. p. 111
Series
Mid Sweden University licentiate thesis, ISSN 1652-8948 ; 82
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-16698 (URN)STC (Local ID)978-91-87103-16-2 (ISBN)STC (Archive number)STC (OAI)
Available from: 2012-08-10 Created: 2012-08-10 Last updated: 2016-10-20Bibliographically approved
2. Technology Driven Obsolescence Management for Embedded Systems
Open this publication in new window or tab >>Technology Driven Obsolescence Management for Embedded Systems
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In this thesis, the work presented is in relation to technology driven obsolescence management for embedded systems.

Component obsolescence problems may occur in systems with a life cycle longer than that of one or more of their components when there is a demand without enough existing stock, such as automotive, avionics, military applications, etc. This thesis analyzes the component obsolescence problem from both the design technology selection and management perspectives.

Design technologies selection is associated with hardware and software. Several hardware platforms such as COTS and field-programmable gate array (FPGA) are discussed. FPGA intellectual property (IP) portability is emphasized which will affect the obsolescence management cost. Embedded software is also a crucial part for system sustainment. A risk analysis is performed in relation to long life cycle systems for different design technologies. Different platform cases are evaluated by analyzing the essence of each case and the consequences of different risk scenarios during system maintenance. This has shown that an FPGA platform with the vendor and device independent soft IPs has the highest maintainability and the minimum redesign cost.

The reuse of a predefined IP can shorten the development times and assist the designer to meet time-to-market (TTM) requirements. System migration between devices is unavoidable, especially when it has a long life cycle expectation, so IP portability becomes an important issue for system maintenance. If an IP for FPGAs is truly portable, it must be easily adaptable to different communication interfaces, being portable between different FPGA vendors and devices, having no dependencies on the tool set and library used for the system design and no restriction on the communication interface. An M-JPEG decoder and a soft microprocessor portability analysis case study are presented in the thesis. A methodology is proposed to ease the interface modification and interface reuse, thus to increase the portability of an IP.

A strategic proactive obsolescence management model is proposed from a management perspective. This model can estimate the minimum management costs for a system with different architectures. It consists of two parts. The first is to generate a graph, which is in the form of an obsolescence management diagram. A segments table containing the data of this diagram is calculated and prepared for optimization at a second step. This second part is to find the minimum cost for system obsolescence management. Mixed integer linear programming (MILP) is used to calculate the minimum management cost and schedule. The model is open sourced thus allowing other research groups to freely download and modify it.

Both the design technology selection and the strategic proactive obsolescence management are demonstrated by an industrial display computer system case study. The results show significant cost avoidance as compared to the original method used by the company.

Finally, the research results are encapsulated into an obsolescence management cost avoidance methodology.  

Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2014. p. 178
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 186
Keywords
Long life cycle, embedded system, DMSMS, obsolescnece, FPGA, IP, portability
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-21744 (URN)STC (Local ID)978-91-87557-50-7 (ISBN)STC (Archive number)STC (OAI)
Public defence
2014-05-15, O102, Sundsvall, 11:17 (English)
Opponent
Supervisors
Funder
Knowledge Foundation
Available from: 2014-04-17 Created: 2014-04-11 Last updated: 2017-03-06Bibliographically approved
3. Real-Time Optical Position Sensing on FPGA
Open this publication in new window or tab >>Real-Time Optical Position Sensing on FPGA
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Place, publisher, year, edition, pages
Sundsvall: Mid Sweden University, 2014. p. 95
Series
Mid Sweden University doctoral thesis, ISSN 1652-893X ; 176
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:miun:diva-24035 (URN)STC (Local ID)978-91-87557-29-3 (ISBN)STC (Archive number)STC (OAI)
Supervisors
Available from: 2015-01-08 Created: 2015-01-07 Last updated: 2017-03-06Bibliographically approved

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