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A 7 GHz 1.5-V dual-modulus prescaler in 0.18 mu m copper-CMOS technology
2002 (Engelska)Ingår i: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 32, nr 1, s. 89-95Artikel i tidskrift (Refereegranskat) Published
Abstract [en]

A dual-modulus prescaler using True-Single-Phase-Clock (TSPC) logic is implemented in a 0.18 mum copper CMOS technology. With careful design and optimization the prescaler is able to operate at frequency up to 7.14 GHz at 1.5 V supply voltage. The high-speed operation is attributed to the adoption of the TSPC dynamic logic, and the all copper interconnect CMOS process which has much less interconnect parasitics than conventional aluminum technology. The design facilitates the implementation of a fully integrated RF CMOS phase-locked loop for applications in the 5.8 GHz ISM band such as wireless LAN.

Ort, förlag, år, upplaga, sidor
2002. Vol. 32, nr 1, s. 89-95
Nyckelord [en]
dual-modulus prescaler, frequency divider, TSPC logic, PLL, CMOS, circuit technique, flip-flops, speed, optimization, cml, ecl
Identifikatorer
URN: urn:nbn:se:kth:diva-21654ISI: 000176500900011OAI: oai:DiVA.org:kth-21654DiVA, id: diva2:340352
Anmärkning
QC 20100525Tillgänglig från: 2010-08-10 Skapad: 2010-08-10 Senast uppdaterad: 2017-12-12Bibliografiskt granskad

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Ismail, Mohammed
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Analog Integrated Circuits and Signal Processing

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