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A modular design space exploration framework for multiprocessor real-time systems
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik.ORCID-id: 0000-0003-2670-3022
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik.ORCID-id: 0000-0001-9350-7772
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik.ORCID-id: 0000-0003-4859-3100
2017 (engelsk)Inngår i: Forum on Specification and Design Languages, IEEE, 2017, artikkel-id 7880377Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Embedded system designers often face a large number of design alternatives when designing complex systems. A designer must select an alternative which satisfies application constraints (e.g. timing requirements) while optimizing system level objectives such as overall energy consumption. The size of design space is often very large giving rise to the need for systematic Design Space Exploration (DSE) methods. In this paper we address the DSE problem for real-time applications that belong to two different domains: (i) streaming applications modeled using the synchronous dataflow graphs; (ii) feedback control tasks modeled using the periodic task model. We consider a heterogeneous multiprocessor platform in which processors communicate through a predictable bus architecture. We present our DSE tool in which the DSE problem is modeled as a constraint satisfaction problem, and it is solved using a constraint programming solver. This approach provides a modular framework in which different constraints such as deadline, throughput and energy consumption can easily be plugged depending on the system being designed.

sted, utgiver, år, opplag, sider
IEEE, 2017. artikkel-id 7880377
Emneord [en]
Constraint Programming, Design Space Exploration, Multiprocessors, Periodic Tasks, Real-Time Systems, Synchronous Dataflow, Computer programming, Constraint satisfaction problems, Constraint theory, Data flow analysis, Embedded systems, Energy utilization, Interactive computer systems, Multiprocessing systems, Specifications, Real time systems
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Identifikatorer
URN: urn:nbn:se:kth:diva-210144DOI: 10.1109/FDL.2016.7880377Scopus ID: 2-s2.0-85017111938ISBN: 9791092279177 (tryckt)OAI: oai:DiVA.org:kth-210144DiVA, id: diva2:1118421
Konferanse
2016 Forum on Specification and Design Languages, FDL 2016, 14 September 2016 through 16 September 2016
Merknad

QC 20170630

Tilgjengelig fra: 2017-06-30 Laget: 2017-06-30 Sist oppdatert: 2017-06-30bibliografisk kontrollert

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